SPIv1 fixes.
| @@ -121,18 +121,25 @@ | ||
| 121 | 121 | /*===========================================================================*/ |
| 122 | 122 | |
| 123 | 123 | static void spi_lld_configure(SPIDriver *spip) { |
| 124 | + uint32_t cr1, cr2; | |
| 124 | 125 | |
| 126 | + /* Disabling SPI during (re)configuration.*/ | |
| 127 | + spip->spi->CR1 = 0U; | |
| 128 | + | |
| 129 | + /* Common CR1 and CR2 options.*/ | |
| 130 | + cr1 = spip->config->cr1 & ~(SPI_CR1_MSTR | SPI_CR1_SPE); | |
| 131 | + cr2 = spip->config->cr2 | SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN; | |
| 132 | + | |
| 125 | 133 | /* SPI setup.*/ |
| 126 | - if (spip->config->slave) { | |
| 127 | - spip->spi->CR1 = spip->config->cr1 & ~(SPI_CR1_MSTR | SPI_CR1_SPE); | |
| 128 | - spip->spi->CR2 = spip->config->cr2 | | |
| 129 | - SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN; | |
| 134 | + if (spip->config->slave == false) { | |
| 135 | + cr1 |= SPI_CR1_MSTR; | |
| 136 | + cr2 |= SPI_CR2_SSOE; | |
| 130 | 137 | } |
| 131 | - else { | |
| 132 | - spip->spi->CR1 = (spip->config->cr1 | SPI_CR1_MSTR) & ~SPI_CR1_SPE; | |
| 133 | - spip->spi->CR2 = spip->config->cr2 | SPI_CR2_SSOE | | |
| 134 | - SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN; | |
| 135 | - } | |
| 138 | + | |
| 139 | + /* New configuration.*/ | |
| 140 | + spip->spi->CR2 = cr2; | |
| 141 | + spip->spi->CR1 = cr1; | |
| 142 | + spip->spi->CR1 = cr1 | SPI_CR1_SPE; | |
| 136 | 143 | } |
| 137 | 144 | |
| 138 | 145 | /** |
| @@ -727,8 +734,6 @@ | ||
| 727 | 734 | dmaStreamEnable(spip->dmarx); |
| 728 | 735 | dmaStreamEnable(spip->dmatx); |
| 729 | 736 | |
| 730 | - spip->spi->CR1 |= SPI_CR1_SPE; | |
| 731 | - | |
| 732 | 737 | return HAL_RET_SUCCESS; |
| 733 | 738 | } |
| 734 | 739 |
| @@ -764,8 +769,6 @@ | ||
| 764 | 769 | dmaStreamEnable(spip->dmarx); |
| 765 | 770 | dmaStreamEnable(spip->dmatx); |
| 766 | 771 | |
| 767 | - spip->spi->CR1 |= SPI_CR1_SPE; | |
| 768 | - | |
| 769 | 772 | return HAL_RET_SUCCESS; |
| 770 | 773 | } |
| 771 | 774 |
| @@ -798,8 +801,6 @@ | ||
| 798 | 801 | dmaStreamEnable(spip->dmarx); |
| 799 | 802 | dmaStreamEnable(spip->dmatx); |
| 800 | 803 | |
| 801 | - spip->spi->CR1 |= SPI_CR1_SPE; | |
| 802 | - | |
| 803 | 804 | return HAL_RET_SUCCESS; |
| 804 | 805 | } |
| 805 | 806 |
| @@ -832,8 +833,6 @@ | ||
| 832 | 833 | dmaStreamEnable(spip->dmarx); |
| 833 | 834 | dmaStreamEnable(spip->dmatx); |
| 834 | 835 | |
| 835 | - spip->spi->CR1 |= SPI_CR1_SPE; | |
| 836 | - | |
| 837 | 836 | return HAL_RET_SUCCESS; |
| 838 | 837 | } |
| 839 | 838 |
| @@ -874,18 +873,10 @@ | ||
| 874 | 873 | */ |
| 875 | 874 | uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) { |
| 876 | 875 | |
| 877 | - /* Enabling SPI for the exchange.*/ | |
| 878 | - spip->spi->CR1 |= SPI_CR1_SPE; | |
| 879 | - | |
| 880 | 876 | spip->spi->DR = frame; |
| 881 | 877 | while ((spip->spi->SR & SPI_SR_RXNE) == 0U) |
| 882 | 878 | ; |
| 883 | - frame = spip->spi->DR; | |
| 884 | - | |
| 885 | - /* Disabling SPI and done.*/ | |
| 886 | - spip->spi->CR1 &= ~SPI_CR1_SPE; | |
| 887 | - | |
| 888 | - return frame; | |
| 879 | + return spip->spi->DR; | |
| 889 | 880 | } |
| 890 | 881 | |
| 891 | 882 | #endif /* HAL_USE_SPI */ |
ChibiOS
gdisirio
trunk/os/hal/ports/STM32/LLD/SPIv1/hal_spi_v2_lld.c