GNU Binutils with patches for OS216
修订版 | 49eec19300ff80969c1e9a19e971b48ffa59ef16 (tree) |
---|---|
时间 | 2013-11-06 05:54:22 |
作者 | Yufeng Zhang <yufeng.zhang@arm....> |
Commiter | Yufeng Zhang |
gas/
* config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
call aarch64_sys_reg_deprecated_p and warn about the deprecated
system registers.
gas/testsuite/
* gas/aarch64/deprecated.d: New file.
* gas/aarch64/deprecated.l: New file.
* gas/aarch64/deprecated.s: New file.
* gas/aarch64/sysreg-1.s: Add tests.
* gas/aarch64/sysreg-1.d: Add tests.
include/opcode/
* aarch64.h (aarch64_sys_reg): New typedef.
(aarch64_sys_regs): Change to define with the new type.
(aarch64_sys_reg_deprecated_p): Declare.
opcodes/
* aarch64-opc.c (F_DEPRECATED): New macro.
(aarch64_sys_regs): Update; flag "spsr_svc" and "spsr_hyp" with
F_DEPRECATED.
(aarch64_print_operand): Call aarch64_sys_reg_deprecated_p on
AARCH64_OPND_SYSREG.
@@ -1,5 +1,11 @@ | ||
1 | 1 | 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com> |
2 | 2 | |
3 | + * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg; | |
4 | + call aarch64_sys_reg_deprecated_p and warn about the deprecated | |
5 | + system registers. | |
6 | + | |
7 | +2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com> | |
8 | + | |
3 | 9 | * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1. |
4 | 10 | |
5 | 11 | 2013-11-05 Will Newton <will.newton@linaro.org> |
@@ -3277,7 +3277,7 @@ parse_sys_reg (char **str, struct hash_control *sys_regs, int imple_defined_p) | ||
3277 | 3277 | { |
3278 | 3278 | char *p, *q; |
3279 | 3279 | char buf[32]; |
3280 | - const struct aarch64_name_value_pair *o; | |
3280 | + const aarch64_sys_reg *o; | |
3281 | 3281 | int value; |
3282 | 3282 | |
3283 | 3283 | p = buf; |
@@ -3313,7 +3313,12 @@ parse_sys_reg (char **str, struct hash_control *sys_regs, int imple_defined_p) | ||
3313 | 3313 | } |
3314 | 3314 | } |
3315 | 3315 | else |
3316 | - value = o->value; | |
3316 | + { | |
3317 | + if (aarch64_sys_reg_deprecated_p (o)) | |
3318 | + as_warn (_("system register name '%s' is deprecated and may be " | |
3319 | +"removed in a future release"), buf); | |
3320 | + value = o->value; | |
3321 | + } | |
3317 | 3322 | |
3318 | 3323 | *str = q; |
3319 | 3324 | return value; |
@@ -1,5 +1,13 @@ | ||
1 | 1 | 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com> |
2 | 2 | |
3 | + * gas/aarch64/deprecated.d: New file. | |
4 | + * gas/aarch64/deprecated.l: New file. | |
5 | + * gas/aarch64/deprecated.s: New file. | |
6 | + * gas/aarch64/sysreg-1.s: Add tests. | |
7 | + * gas/aarch64/sysreg-1.d: Add tests. | |
8 | + | |
9 | +2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com> | |
10 | + | |
3 | 11 | * gas/aarch64/alias.s: Add tests. |
4 | 12 | * gas/aarch64/alias.d: Update. |
5 | 13 | * gas/aarch64/no-aliases.d: Update. |
@@ -0,0 +1,4 @@ | ||
1 | +#name: Deprecated Support | |
2 | +#source: deprecated.s | |
3 | +#error-output: deprecated.l | |
4 | +#as: --warn |
@@ -0,0 +1,3 @@ | ||
1 | +[^:]*: Assembler messages: | |
2 | +[^:]*:4: Warning: system register name 'spsr_svc' is deprecated and may be removed in a future release | |
3 | +[^:]*:5: Warning: system register name 'spsr_hyp' is deprecated and may be removed in a future release |
@@ -0,0 +1,5 @@ | ||
1 | +// deprecated.s Test file for diagnostics on deprecated features. | |
2 | + | |
3 | +.text | |
4 | + mrs x0, spsr_svc | |
5 | + msr spsr_hyp, x15 |
@@ -4277,3 +4277,9 @@ Disassembly of section \.text: | ||
4277 | 4277 | 42b4: d53cc04f mrs x15, rmr_el2 |
4278 | 4278 | 42b8: d51ec04f msr rmr_el3, x15 |
4279 | 4279 | 42bc: d53ec04f mrs x15, rmr_el3 |
4280 | + 42c0: d518400f msr spsr_el1, x15 | |
4281 | + 42c4: d538400f mrs x15, spsr_el1 | |
4282 | + 42c8: d51c400f msr spsr_el2, x15 | |
4283 | + 42cc: d53c400f mrs x15, spsr_el2 | |
4284 | + 42d0: d51e400f msr spsr_el3, x15 | |
4285 | + 42d4: d53e400f mrs x15, spsr_el3 |
@@ -162,3 +162,7 @@ | ||
162 | 162 | rw_sys_reg sys_reg=rmr_el1 xreg=x15 r=1 w=1 |
163 | 163 | rw_sys_reg sys_reg=rmr_el2 xreg=x15 r=1 w=1 |
164 | 164 | rw_sys_reg sys_reg=rmr_el3 xreg=x15 r=1 w=1 |
165 | + | |
166 | + rw_sys_reg sys_reg=spsr_el1 xreg=x15 r=1 w=1 | |
167 | + rw_sys_reg sys_reg=spsr_el2 xreg=x15 r=1 w=1 | |
168 | + rw_sys_reg sys_reg=spsr_el3 xreg=x15 r=1 w=1 |
@@ -1,5 +1,11 @@ | ||
1 | 1 | 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com> |
2 | 2 | |
3 | + * aarch64.h (aarch64_sys_reg): New typedef. | |
4 | + (aarch64_sys_regs): Change to define with the new type. | |
5 | + (aarch64_sys_reg_deprecated_p): Declare. | |
6 | + | |
7 | +2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com> | |
8 | + | |
3 | 9 | * aarch64.h (enum aarch64_operand_class): Add AARCH64_OPND_CLASS_COND. |
4 | 10 | (enum aarch64_opnd): Add AARCH64_OPND_COND1. |
5 | 11 |
@@ -611,13 +611,22 @@ struct aarch64_name_value_pair | ||
611 | 611 | }; |
612 | 612 | |
613 | 613 | extern const struct aarch64_name_value_pair aarch64_operand_modifiers []; |
614 | -extern const struct aarch64_name_value_pair aarch64_sys_regs []; | |
615 | 614 | extern const struct aarch64_name_value_pair aarch64_pstatefields []; |
616 | 615 | extern const struct aarch64_name_value_pair aarch64_barrier_options [16]; |
617 | 616 | extern const struct aarch64_name_value_pair aarch64_prfops [32]; |
618 | 617 | |
619 | 618 | typedef struct |
620 | 619 | { |
620 | + const char * name; | |
621 | + aarch64_insn value; | |
622 | + uint32_t flags; | |
623 | +} aarch64_sys_reg; | |
624 | + | |
625 | +extern const aarch64_sys_reg aarch64_sys_regs []; | |
626 | +extern bfd_boolean aarch64_sys_reg_deprecated_p (const aarch64_sys_reg *); | |
627 | + | |
628 | +typedef struct | |
629 | +{ | |
621 | 630 | const char *template; |
622 | 631 | uint32_t value; |
623 | 632 | int has_xt; |
@@ -1,5 +1,13 @@ | ||
1 | 1 | 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com> |
2 | 2 | |
3 | + * aarch64-opc.c (F_DEPRECATED): New macro. | |
4 | + (aarch64_sys_regs): Update; flag "spsr_svc" and "spsr_hyp" with | |
5 | + F_DEPRECATED. | |
6 | + (aarch64_print_operand): Call aarch64_sys_reg_deprecated_p on | |
7 | + AARCH64_OPND_SYSREG. | |
8 | + | |
9 | +2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com> | |
10 | + | |
3 | 11 | * aarch64-dis.c (convert_ubfm_to_lsl): Check for cond != '111x'. |
4 | 12 | (convert_from_csel): Likewise. |
5 | 13 | * aarch64-opc.c (operand_general_constraint_met_p): Handle |
@@ -2616,7 +2616,8 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc, | ||
2616 | 2616 | |
2617 | 2617 | case AARCH64_OPND_SYSREG: |
2618 | 2618 | for (i = 0; aarch64_sys_regs[i].name; ++i) |
2619 | - if (aarch64_sys_regs[i].value == opnd->sysreg) | |
2619 | + if (aarch64_sys_regs[i].value == opnd->sysreg | |
2620 | + && ! aarch64_sys_reg_deprecated_p (&aarch64_sys_regs[i])) | |
2620 | 2621 | break; |
2621 | 2622 | if (aarch64_sys_regs[i].name) |
2622 | 2623 | snprintf (buf, size, "%s", aarch64_sys_regs[i].name); |
@@ -2693,320 +2694,331 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc, | ||
2693 | 2694 | #define C14 14 |
2694 | 2695 | #define C15 15 |
2695 | 2696 | |
2697 | +#ifdef F_DEPRECATED | |
2698 | +#undef F_DEPRECATED | |
2699 | +#endif | |
2700 | +#define F_DEPRECATED 0x1 /* Deprecated system register. */ | |
2701 | + | |
2696 | 2702 | /* TODO there are two more issues need to be resolved |
2697 | 2703 | 1. handle read-only and write-only system registers |
2698 | 2704 | 2. handle cpu-implementation-defined system registers. */ |
2699 | -const struct aarch64_name_value_pair aarch64_sys_regs [] = | |
2700 | -{ | |
2701 | - { "spsr_el1", CPEN_(0,C0,0) }, /* = spsr_svc */ | |
2702 | - { "elr_el1", CPEN_(0,C0,1) }, | |
2703 | - { "sp_el0", CPEN_(0,C1,0) }, | |
2704 | - { "spsel", CPEN_(0,C2,0) }, | |
2705 | - { "daif", CPEN_(3,C2,1) }, | |
2706 | - { "currentel", CPEN_(0,C2,2) }, /* RO */ | |
2707 | - { "nzcv", CPEN_(3,C2,0) }, | |
2708 | - { "fpcr", CPEN_(3,C4,0) }, | |
2709 | - { "fpsr", CPEN_(3,C4,1) }, | |
2710 | - { "dspsr_el0", CPEN_(3,C5,0) }, | |
2711 | - { "dlr_el0", CPEN_(3,C5,1) }, | |
2712 | - { "spsr_el2", CPEN_(4,C0,0) }, /* = spsr_hyp */ | |
2713 | - { "elr_el2", CPEN_(4,C0,1) }, | |
2714 | - { "sp_el1", CPEN_(4,C1,0) }, | |
2715 | - { "spsr_irq", CPEN_(4,C3,0) }, | |
2716 | - { "spsr_abt", CPEN_(4,C3,1) }, | |
2717 | - { "spsr_und", CPEN_(4,C3,2) }, | |
2718 | - { "spsr_fiq", CPEN_(4,C3,3) }, | |
2719 | - { "spsr_el3", CPEN_(6,C0,0) }, | |
2720 | - { "elr_el3", CPEN_(6,C0,1) }, | |
2721 | - { "sp_el2", CPEN_(6,C1,0) }, | |
2722 | - { "spsr_svc", CPEN_(0,C0,0) }, /* = spsr_el1 */ | |
2723 | - { "spsr_hyp", CPEN_(4,C0,0) }, /* = spsr_el2 */ | |
2724 | - { "midr_el1", CPENC(3,0,C0,C0,0) }, /* RO */ | |
2725 | - { "ctr_el0", CPENC(3,3,C0,C0,1) }, /* RO */ | |
2726 | - { "mpidr_el1", CPENC(3,0,C0,C0,5) }, /* RO */ | |
2727 | - { "revidr_el1", CPENC(3,0,C0,C0,6) }, /* RO */ | |
2728 | - { "aidr_el1", CPENC(3,1,C0,C0,7) }, /* RO */ | |
2729 | - { "dczid_el0", CPENC(3,3,C0,C0,7) }, /* RO */ | |
2730 | - { "id_dfr0_el1", CPENC(3,0,C0,C1,2) }, /* RO */ | |
2731 | - { "id_pfr0_el1", CPENC(3,0,C0,C1,0) }, /* RO */ | |
2732 | - { "id_pfr1_el1", CPENC(3,0,C0,C1,1) }, /* RO */ | |
2733 | - { "id_afr0_el1", CPENC(3,0,C0,C1,3) }, /* RO */ | |
2734 | - { "id_mmfr0_el1", CPENC(3,0,C0,C1,4) }, /* RO */ | |
2735 | - { "id_mmfr1_el1", CPENC(3,0,C0,C1,5) }, /* RO */ | |
2736 | - { "id_mmfr2_el1", CPENC(3,0,C0,C1,6) }, /* RO */ | |
2737 | - { "id_mmfr3_el1", CPENC(3,0,C0,C1,7) }, /* RO */ | |
2738 | - { "id_isar0_el1", CPENC(3,0,C0,C2,0) }, /* RO */ | |
2739 | - { "id_isar1_el1", CPENC(3,0,C0,C2,1) }, /* RO */ | |
2740 | - { "id_isar2_el1", CPENC(3,0,C0,C2,2) }, /* RO */ | |
2741 | - { "id_isar3_el1", CPENC(3,0,C0,C2,3) }, /* RO */ | |
2742 | - { "id_isar4_el1", CPENC(3,0,C0,C2,4) }, /* RO */ | |
2743 | - { "id_isar5_el1", CPENC(3,0,C0,C2,5) }, /* RO */ | |
2744 | - { "mvfr0_el1", CPENC(3,0,C0,C3,0) }, /* RO */ | |
2745 | - { "mvfr1_el1", CPENC(3,0,C0,C3,1) }, /* RO */ | |
2746 | - { "mvfr2_el1", CPENC(3,0,C0,C3,2) }, /* RO */ | |
2747 | - { "ccsidr_el1", CPENC(3,1,C0,C0,0) }, /* RO */ | |
2748 | - { "id_aa64pfr0_el1", CPENC(3,0,C0,C4,0) }, /* RO */ | |
2749 | - { "id_aa64pfr1_el1", CPENC(3,0,C0,C4,1) }, /* RO */ | |
2750 | - { "id_aa64dfr0_el1", CPENC(3,0,C0,C5,0) }, /* RO */ | |
2751 | - { "id_aa64dfr1_el1", CPENC(3,0,C0,C5,1) }, /* RO */ | |
2752 | - { "id_aa64isar0_el1", CPENC(3,0,C0,C6,0) }, /* RO */ | |
2753 | - { "id_aa64isar1_el1", CPENC(3,0,C0,C6,1) }, /* RO */ | |
2754 | - { "id_aa64mmfr0_el1", CPENC(3,0,C0,C7,0) }, /* RO */ | |
2755 | - { "id_aa64mmfr1_el1", CPENC(3,0,C0,C7,1) }, /* RO */ | |
2756 | - { "id_aa64afr0_el1", CPENC(3,0,C0,C5,4) }, /* RO */ | |
2757 | - { "id_aa64afr1_el1", CPENC(3,0,C0,C5,5) }, /* RO */ | |
2758 | - { "clidr_el1", CPENC(3,1,C0,C0,1) }, /* RO */ | |
2759 | - { "csselr_el1", CPENC(3,2,C0,C0,0) }, /* RO */ | |
2760 | - { "vpidr_el2", CPENC(3,4,C0,C0,0) }, | |
2761 | - { "vmpidr_el2", CPENC(3,4,C0,C0,5) }, | |
2762 | - { "sctlr_el1", CPENC(3,0,C1,C0,0) }, | |
2763 | - { "sctlr_el2", CPENC(3,4,C1,C0,0) }, | |
2764 | - { "sctlr_el3", CPENC(3,6,C1,C0,0) }, | |
2765 | - { "actlr_el1", CPENC(3,0,C1,C0,1) }, | |
2766 | - { "actlr_el2", CPENC(3,4,C1,C0,1) }, | |
2767 | - { "actlr_el3", CPENC(3,6,C1,C0,1) }, | |
2768 | - { "cpacr_el1", CPENC(3,0,C1,C0,2) }, | |
2769 | - { "cptr_el2", CPENC(3,4,C1,C1,2) }, | |
2770 | - { "cptr_el3", CPENC(3,6,C1,C1,2) }, | |
2771 | - { "scr_el3", CPENC(3,6,C1,C1,0) }, | |
2772 | - { "hcr_el2", CPENC(3,4,C1,C1,0) }, | |
2773 | - { "mdcr_el2", CPENC(3,4,C1,C1,1) }, | |
2774 | - { "mdcr_el3", CPENC(3,6,C1,C3,1) }, | |
2775 | - { "hstr_el2", CPENC(3,4,C1,C1,3) }, | |
2776 | - { "hacr_el2", CPENC(3,4,C1,C1,7) }, | |
2777 | - { "ttbr0_el1", CPENC(3,0,C2,C0,0) }, | |
2778 | - { "ttbr1_el1", CPENC(3,0,C2,C0,1) }, | |
2779 | - { "ttbr0_el2", CPENC(3,4,C2,C0,0) }, | |
2780 | - { "ttbr0_el3", CPENC(3,6,C2,C0,0) }, | |
2781 | - { "vttbr_el2", CPENC(3,4,C2,C1,0) }, | |
2782 | - { "tcr_el1", CPENC(3,0,C2,C0,2) }, | |
2783 | - { "tcr_el2", CPENC(3,4,C2,C0,2) }, | |
2784 | - { "tcr_el3", CPENC(3,6,C2,C0,2) }, | |
2785 | - { "vtcr_el2", CPENC(3,4,C2,C1,2) }, | |
2786 | - { "afsr0_el1", CPENC(3,0,C5,C1,0) }, | |
2787 | - { "afsr1_el1", CPENC(3,0,C5,C1,1) }, | |
2788 | - { "afsr0_el2", CPENC(3,4,C5,C1,0) }, | |
2789 | - { "afsr1_el2", CPENC(3,4,C5,C1,1) }, | |
2790 | - { "afsr0_el3", CPENC(3,6,C5,C1,0) }, | |
2791 | - { "afsr1_el3", CPENC(3,6,C5,C1,1) }, | |
2792 | - { "esr_el1", CPENC(3,0,C5,C2,0) }, | |
2793 | - { "esr_el2", CPENC(3,4,C5,C2,0) }, | |
2794 | - { "esr_el3", CPENC(3,6,C5,C2,0) }, | |
2795 | - { "fpexc32_el2", CPENC(3,4,C5,C3,0) }, | |
2796 | - { "far_el1", CPENC(3,0,C6,C0,0) }, | |
2797 | - { "far_el2", CPENC(3,4,C6,C0,0) }, | |
2798 | - { "far_el3", CPENC(3,6,C6,C0,0) }, | |
2799 | - { "hpfar_el2", CPENC(3,4,C6,C0,4) }, | |
2800 | - { "par_el1", CPENC(3,0,C7,C4,0) }, | |
2801 | - { "mair_el1", CPENC(3,0,C10,C2,0) }, | |
2802 | - { "mair_el2", CPENC(3,4,C10,C2,0) }, | |
2803 | - { "mair_el3", CPENC(3,6,C10,C2,0) }, | |
2804 | - { "amair_el1", CPENC(3,0,C10,C3,0) }, | |
2805 | - { "amair_el2", CPENC(3,4,C10,C3,0) }, | |
2806 | - { "amair_el3", CPENC(3,6,C10,C3,0) }, | |
2807 | - { "vbar_el1", CPENC(3,0,C12,C0,0) }, | |
2808 | - { "vbar_el2", CPENC(3,4,C12,C0,0) }, | |
2809 | - { "vbar_el3", CPENC(3,6,C12,C0,0) }, | |
2810 | - { "rvbar_el1", CPENC(3,0,C12,C0,1) }, /* RO */ | |
2811 | - { "rvbar_el2", CPENC(3,4,C12,C0,1) }, /* RO */ | |
2812 | - { "rvbar_el3", CPENC(3,6,C12,C0,1) }, /* RO */ | |
2813 | - { "rmr_el1", CPENC(3,0,C12,C0,2) }, | |
2814 | - { "rmr_el2", CPENC(3,4,C12,C0,2) }, | |
2815 | - { "rmr_el3", CPENC(3,6,C12,C0,2) }, | |
2816 | - { "isr_el1", CPENC(3,0,C12,C1,0) }, /* RO */ | |
2817 | - { "contextidr_el1", CPENC(3,0,C13,C0,1) }, | |
2818 | - { "tpidr_el0", CPENC(3,3,C13,C0,2) }, | |
2819 | - { "tpidrro_el0", CPENC(3,3,C13,C0,3) }, /* RO */ | |
2820 | - { "tpidr_el1", CPENC(3,0,C13,C0,4) }, | |
2821 | - { "tpidr_el2", CPENC(3,4,C13,C0,2) }, | |
2822 | - { "tpidr_el3", CPENC(3,6,C13,C0,2) }, | |
2823 | - { "teecr32_el1", CPENC(2,2,C0, C0,0) }, /* See section 3.9.7.1 */ | |
2824 | - { "cntfrq_el0", CPENC(3,3,C14,C0,0) }, /* RO */ | |
2825 | - { "cntpct_el0", CPENC(3,3,C14,C0,1) }, /* RO */ | |
2826 | - { "cntvct_el0", CPENC(3,3,C14,C0,2) }, /* RO */ | |
2827 | - { "cntvoff_el2", CPENC(3,4,C14,C0,3) }, | |
2828 | - { "cntkctl_el1", CPENC(3,0,C14,C1,0) }, | |
2829 | - { "cnthctl_el2", CPENC(3,4,C14,C1,0) }, | |
2830 | - { "cntp_tval_el0", CPENC(3,3,C14,C2,0) }, | |
2831 | - { "cntp_ctl_el0", CPENC(3,3,C14,C2,1) }, | |
2832 | - { "cntp_cval_el0", CPENC(3,3,C14,C2,2) }, | |
2833 | - { "cntv_tval_el0", CPENC(3,3,C14,C3,0) }, | |
2834 | - { "cntv_ctl_el0", CPENC(3,3,C14,C3,1) }, | |
2835 | - { "cntv_cval_el0", CPENC(3,3,C14,C3,2) }, | |
2836 | - { "cnthp_tval_el2", CPENC(3,4,C14,C2,0) }, | |
2837 | - { "cnthp_ctl_el2", CPENC(3,4,C14,C2,1) }, | |
2838 | - { "cnthp_cval_el2", CPENC(3,4,C14,C2,2) }, | |
2839 | - { "cntps_tval_el1", CPENC(3,7,C14,C2,0) }, | |
2840 | - { "cntps_ctl_el1", CPENC(3,7,C14,C2,1) }, | |
2841 | - { "cntps_cval_el1", CPENC(3,7,C14,C2,2) }, | |
2842 | - { "dacr32_el2", CPENC(3,4,C3,C0,0) }, | |
2843 | - { "ifsr32_el2", CPENC(3,4,C5,C0,1) }, | |
2844 | - { "teehbr32_el1", CPENC(2,2,C1,C0,0) }, | |
2845 | - { "sder32_el3", CPENC(3,6,C1,C1,1) }, | |
2846 | - { "mdscr_el1", CPENC(2,0,C0, C2, 2) }, | |
2847 | - { "mdccsr_el0", CPENC(2,3,C0, C1, 0) }, /* r */ | |
2848 | - { "mdccint_el1", CPENC(2,0,C0, C2, 0) }, | |
2849 | - { "dbgdtr_el0", CPENC(2,3,C0, C4, 0) }, | |
2850 | - { "dbgdtrrx_el0", CPENC(2,3,C0, C5, 0) }, /* r */ | |
2851 | - { "dbgdtrtx_el0", CPENC(2,3,C0, C5, 0) }, /* w */ | |
2852 | - { "osdtrrx_el1", CPENC(2,0,C0, C0, 2) }, /* r */ | |
2853 | - { "osdtrtx_el1", CPENC(2,0,C0, C3, 2) }, /* w */ | |
2854 | - { "oseccr_el1", CPENC(2,0,C0, C6, 2) }, | |
2855 | - { "dbgvcr32_el2", CPENC(2,4,C0, C7, 0) }, | |
2856 | - { "dbgbvr0_el1", CPENC(2,0,C0, C0, 4) }, | |
2857 | - { "dbgbvr1_el1", CPENC(2,0,C0, C1, 4) }, | |
2858 | - { "dbgbvr2_el1", CPENC(2,0,C0, C2, 4) }, | |
2859 | - { "dbgbvr3_el1", CPENC(2,0,C0, C3, 4) }, | |
2860 | - { "dbgbvr4_el1", CPENC(2,0,C0, C4, 4) }, | |
2861 | - { "dbgbvr5_el1", CPENC(2,0,C0, C5, 4) }, | |
2862 | - { "dbgbvr6_el1", CPENC(2,0,C0, C6, 4) }, | |
2863 | - { "dbgbvr7_el1", CPENC(2,0,C0, C7, 4) }, | |
2864 | - { "dbgbvr8_el1", CPENC(2,0,C0, C8, 4) }, | |
2865 | - { "dbgbvr9_el1", CPENC(2,0,C0, C9, 4) }, | |
2866 | - { "dbgbvr10_el1", CPENC(2,0,C0, C10,4) }, | |
2867 | - { "dbgbvr11_el1", CPENC(2,0,C0, C11,4) }, | |
2868 | - { "dbgbvr12_el1", CPENC(2,0,C0, C12,4) }, | |
2869 | - { "dbgbvr13_el1", CPENC(2,0,C0, C13,4) }, | |
2870 | - { "dbgbvr14_el1", CPENC(2,0,C0, C14,4) }, | |
2871 | - { "dbgbvr15_el1", CPENC(2,0,C0, C15,4) }, | |
2872 | - { "dbgbcr0_el1", CPENC(2,0,C0, C0, 5) }, | |
2873 | - { "dbgbcr1_el1", CPENC(2,0,C0, C1, 5) }, | |
2874 | - { "dbgbcr2_el1", CPENC(2,0,C0, C2, 5) }, | |
2875 | - { "dbgbcr3_el1", CPENC(2,0,C0, C3, 5) }, | |
2876 | - { "dbgbcr4_el1", CPENC(2,0,C0, C4, 5) }, | |
2877 | - { "dbgbcr5_el1", CPENC(2,0,C0, C5, 5) }, | |
2878 | - { "dbgbcr6_el1", CPENC(2,0,C0, C6, 5) }, | |
2879 | - { "dbgbcr7_el1", CPENC(2,0,C0, C7, 5) }, | |
2880 | - { "dbgbcr8_el1", CPENC(2,0,C0, C8, 5) }, | |
2881 | - { "dbgbcr9_el1", CPENC(2,0,C0, C9, 5) }, | |
2882 | - { "dbgbcr10_el1", CPENC(2,0,C0, C10,5) }, | |
2883 | - { "dbgbcr11_el1", CPENC(2,0,C0, C11,5) }, | |
2884 | - { "dbgbcr12_el1", CPENC(2,0,C0, C12,5) }, | |
2885 | - { "dbgbcr13_el1", CPENC(2,0,C0, C13,5) }, | |
2886 | - { "dbgbcr14_el1", CPENC(2,0,C0, C14,5) }, | |
2887 | - { "dbgbcr15_el1", CPENC(2,0,C0, C15,5) }, | |
2888 | - { "dbgwvr0_el1", CPENC(2,0,C0, C0, 6) }, | |
2889 | - { "dbgwvr1_el1", CPENC(2,0,C0, C1, 6) }, | |
2890 | - { "dbgwvr2_el1", CPENC(2,0,C0, C2, 6) }, | |
2891 | - { "dbgwvr3_el1", CPENC(2,0,C0, C3, 6) }, | |
2892 | - { "dbgwvr4_el1", CPENC(2,0,C0, C4, 6) }, | |
2893 | - { "dbgwvr5_el1", CPENC(2,0,C0, C5, 6) }, | |
2894 | - { "dbgwvr6_el1", CPENC(2,0,C0, C6, 6) }, | |
2895 | - { "dbgwvr7_el1", CPENC(2,0,C0, C7, 6) }, | |
2896 | - { "dbgwvr8_el1", CPENC(2,0,C0, C8, 6) }, | |
2897 | - { "dbgwvr9_el1", CPENC(2,0,C0, C9, 6) }, | |
2898 | - { "dbgwvr10_el1", CPENC(2,0,C0, C10,6) }, | |
2899 | - { "dbgwvr11_el1", CPENC(2,0,C0, C11,6) }, | |
2900 | - { "dbgwvr12_el1", CPENC(2,0,C0, C12,6) }, | |
2901 | - { "dbgwvr13_el1", CPENC(2,0,C0, C13,6) }, | |
2902 | - { "dbgwvr14_el1", CPENC(2,0,C0, C14,6) }, | |
2903 | - { "dbgwvr15_el1", CPENC(2,0,C0, C15,6) }, | |
2904 | - { "dbgwcr0_el1", CPENC(2,0,C0, C0, 7) }, | |
2905 | - { "dbgwcr1_el1", CPENC(2,0,C0, C1, 7) }, | |
2906 | - { "dbgwcr2_el1", CPENC(2,0,C0, C2, 7) }, | |
2907 | - { "dbgwcr3_el1", CPENC(2,0,C0, C3, 7) }, | |
2908 | - { "dbgwcr4_el1", CPENC(2,0,C0, C4, 7) }, | |
2909 | - { "dbgwcr5_el1", CPENC(2,0,C0, C5, 7) }, | |
2910 | - { "dbgwcr6_el1", CPENC(2,0,C0, C6, 7) }, | |
2911 | - { "dbgwcr7_el1", CPENC(2,0,C0, C7, 7) }, | |
2912 | - { "dbgwcr8_el1", CPENC(2,0,C0, C8, 7) }, | |
2913 | - { "dbgwcr9_el1", CPENC(2,0,C0, C9, 7) }, | |
2914 | - { "dbgwcr10_el1", CPENC(2,0,C0, C10,7) }, | |
2915 | - { "dbgwcr11_el1", CPENC(2,0,C0, C11,7) }, | |
2916 | - { "dbgwcr12_el1", CPENC(2,0,C0, C12,7) }, | |
2917 | - { "dbgwcr13_el1", CPENC(2,0,C0, C13,7) }, | |
2918 | - { "dbgwcr14_el1", CPENC(2,0,C0, C14,7) }, | |
2919 | - { "dbgwcr15_el1", CPENC(2,0,C0, C15,7) }, | |
2920 | - { "mdrar_el1", CPENC(2,0,C1, C0, 0) }, /* r */ | |
2921 | - { "oslar_el1", CPENC(2,0,C1, C0, 4) }, /* w */ | |
2922 | - { "oslsr_el1", CPENC(2,0,C1, C1, 4) }, /* r */ | |
2923 | - { "osdlr_el1", CPENC(2,0,C1, C3, 4) }, | |
2924 | - { "dbgprcr_el1", CPENC(2,0,C1, C4, 4) }, | |
2925 | - { "dbgclaimset_el1", CPENC(2,0,C7, C8, 6) }, | |
2926 | - { "dbgclaimclr_el1", CPENC(2,0,C7, C9, 6) }, | |
2927 | - { "dbgauthstatus_el1", CPENC(2,0,C7, C14,6) }, /* r */ | |
2928 | - | |
2929 | - { "pmcr_el0", CPENC(3,3,C9,C12, 0) }, | |
2930 | - { "pmcntenset_el0", CPENC(3,3,C9,C12, 1) }, | |
2931 | - { "pmcntenclr_el0", CPENC(3,3,C9,C12, 2) }, | |
2932 | - { "pmovsclr_el0", CPENC(3,3,C9,C12, 3) }, | |
2933 | - { "pmswinc_el0", CPENC(3,3,C9,C12, 4) }, /* w */ | |
2934 | - { "pmselr_el0", CPENC(3,3,C9,C12, 5) }, | |
2935 | - { "pmceid0_el0", CPENC(3,3,C9,C12, 6) }, /* r */ | |
2936 | - { "pmceid1_el0", CPENC(3,3,C9,C12, 7) }, /* r */ | |
2937 | - { "pmccntr_el0", CPENC(3,3,C9,C13, 0) }, | |
2938 | - { "pmxevtyper_el0", CPENC(3,3,C9,C13, 1) }, | |
2939 | - { "pmxevcntr_el0", CPENC(3,3,C9,C13, 2) }, | |
2940 | - { "pmuserenr_el0", CPENC(3,3,C9,C14, 0) }, | |
2941 | - { "pmintenset_el1", CPENC(3,0,C9,C14, 1) }, | |
2942 | - { "pmintenclr_el1", CPENC(3,0,C9,C14, 2) }, | |
2943 | - { "pmovsset_el0", CPENC(3,3,C9,C14, 3) }, | |
2944 | - { "pmevcntr0_el0", CPENC(3,3,C14,C8, 0) }, | |
2945 | - { "pmevcntr1_el0", CPENC(3,3,C14,C8, 1) }, | |
2946 | - { "pmevcntr2_el0", CPENC(3,3,C14,C8, 2) }, | |
2947 | - { "pmevcntr3_el0", CPENC(3,3,C14,C8, 3) }, | |
2948 | - { "pmevcntr4_el0", CPENC(3,3,C14,C8, 4) }, | |
2949 | - { "pmevcntr5_el0", CPENC(3,3,C14,C8, 5) }, | |
2950 | - { "pmevcntr6_el0", CPENC(3,3,C14,C8, 6) }, | |
2951 | - { "pmevcntr7_el0", CPENC(3,3,C14,C8, 7) }, | |
2952 | - { "pmevcntr8_el0", CPENC(3,3,C14,C9, 0) }, | |
2953 | - { "pmevcntr9_el0", CPENC(3,3,C14,C9, 1) }, | |
2954 | - { "pmevcntr10_el0", CPENC(3,3,C14,C9, 2) }, | |
2955 | - { "pmevcntr11_el0", CPENC(3,3,C14,C9, 3) }, | |
2956 | - { "pmevcntr12_el0", CPENC(3,3,C14,C9, 4) }, | |
2957 | - { "pmevcntr13_el0", CPENC(3,3,C14,C9, 5) }, | |
2958 | - { "pmevcntr14_el0", CPENC(3,3,C14,C9, 6) }, | |
2959 | - { "pmevcntr15_el0", CPENC(3,3,C14,C9, 7) }, | |
2960 | - { "pmevcntr16_el0", CPENC(3,3,C14,C10,0) }, | |
2961 | - { "pmevcntr17_el0", CPENC(3,3,C14,C10,1) }, | |
2962 | - { "pmevcntr18_el0", CPENC(3,3,C14,C10,2) }, | |
2963 | - { "pmevcntr19_el0", CPENC(3,3,C14,C10,3) }, | |
2964 | - { "pmevcntr20_el0", CPENC(3,3,C14,C10,4) }, | |
2965 | - { "pmevcntr21_el0", CPENC(3,3,C14,C10,5) }, | |
2966 | - { "pmevcntr22_el0", CPENC(3,3,C14,C10,6) }, | |
2967 | - { "pmevcntr23_el0", CPENC(3,3,C14,C10,7) }, | |
2968 | - { "pmevcntr24_el0", CPENC(3,3,C14,C11,0) }, | |
2969 | - { "pmevcntr25_el0", CPENC(3,3,C14,C11,1) }, | |
2970 | - { "pmevcntr26_el0", CPENC(3,3,C14,C11,2) }, | |
2971 | - { "pmevcntr27_el0", CPENC(3,3,C14,C11,3) }, | |
2972 | - { "pmevcntr28_el0", CPENC(3,3,C14,C11,4) }, | |
2973 | - { "pmevcntr29_el0", CPENC(3,3,C14,C11,5) }, | |
2974 | - { "pmevcntr30_el0", CPENC(3,3,C14,C11,6) }, | |
2975 | - { "pmevtyper0_el0", CPENC(3,3,C14,C12,0) }, | |
2976 | - { "pmevtyper1_el0", CPENC(3,3,C14,C12,1) }, | |
2977 | - { "pmevtyper2_el0", CPENC(3,3,C14,C12,2) }, | |
2978 | - { "pmevtyper3_el0", CPENC(3,3,C14,C12,3) }, | |
2979 | - { "pmevtyper4_el0", CPENC(3,3,C14,C12,4) }, | |
2980 | - { "pmevtyper5_el0", CPENC(3,3,C14,C12,5) }, | |
2981 | - { "pmevtyper6_el0", CPENC(3,3,C14,C12,6) }, | |
2982 | - { "pmevtyper7_el0", CPENC(3,3,C14,C12,7) }, | |
2983 | - { "pmevtyper8_el0", CPENC(3,3,C14,C13,0) }, | |
2984 | - { "pmevtyper9_el0", CPENC(3,3,C14,C13,1) }, | |
2985 | - { "pmevtyper10_el0", CPENC(3,3,C14,C13,2) }, | |
2986 | - { "pmevtyper11_el0", CPENC(3,3,C14,C13,3) }, | |
2987 | - { "pmevtyper12_el0", CPENC(3,3,C14,C13,4) }, | |
2988 | - { "pmevtyper13_el0", CPENC(3,3,C14,C13,5) }, | |
2989 | - { "pmevtyper14_el0", CPENC(3,3,C14,C13,6) }, | |
2990 | - { "pmevtyper15_el0", CPENC(3,3,C14,C13,7) }, | |
2991 | - { "pmevtyper16_el0", CPENC(3,3,C14,C14,0) }, | |
2992 | - { "pmevtyper17_el0", CPENC(3,3,C14,C14,1) }, | |
2993 | - { "pmevtyper18_el0", CPENC(3,3,C14,C14,2) }, | |
2994 | - { "pmevtyper19_el0", CPENC(3,3,C14,C14,3) }, | |
2995 | - { "pmevtyper20_el0", CPENC(3,3,C14,C14,4) }, | |
2996 | - { "pmevtyper21_el0", CPENC(3,3,C14,C14,5) }, | |
2997 | - { "pmevtyper22_el0", CPENC(3,3,C14,C14,6) }, | |
2998 | - { "pmevtyper23_el0", CPENC(3,3,C14,C14,7) }, | |
2999 | - { "pmevtyper24_el0", CPENC(3,3,C14,C15,0) }, | |
3000 | - { "pmevtyper25_el0", CPENC(3,3,C14,C15,1) }, | |
3001 | - { "pmevtyper26_el0", CPENC(3,3,C14,C15,2) }, | |
3002 | - { "pmevtyper27_el0", CPENC(3,3,C14,C15,3) }, | |
3003 | - { "pmevtyper28_el0", CPENC(3,3,C14,C15,4) }, | |
3004 | - { "pmevtyper29_el0", CPENC(3,3,C14,C15,5) }, | |
3005 | - { "pmevtyper30_el0", CPENC(3,3,C14,C15,6) }, | |
3006 | - { "pmccfiltr_el0", CPENC(3,3,C14,C15,7) }, | |
3007 | - { 0, CPENC(0,0,0,0,0) }, | |
2705 | +const aarch64_sys_reg aarch64_sys_regs [] = | |
2706 | +{ | |
2707 | + { "spsr_el1", CPEN_(0,C0,0), 0 }, /* = spsr_svc */ | |
2708 | + { "elr_el1", CPEN_(0,C0,1), 0 }, | |
2709 | + { "sp_el0", CPEN_(0,C1,0), 0 }, | |
2710 | + { "spsel", CPEN_(0,C2,0), 0 }, | |
2711 | + { "daif", CPEN_(3,C2,1), 0 }, | |
2712 | + { "currentel", CPEN_(0,C2,2), 0 }, /* RO */ | |
2713 | + { "nzcv", CPEN_(3,C2,0), 0 }, | |
2714 | + { "fpcr", CPEN_(3,C4,0), 0 }, | |
2715 | + { "fpsr", CPEN_(3,C4,1), 0 }, | |
2716 | + { "dspsr_el0", CPEN_(3,C5,0), 0 }, | |
2717 | + { "dlr_el0", CPEN_(3,C5,1), 0 }, | |
2718 | + { "spsr_el2", CPEN_(4,C0,0), 0 }, /* = spsr_hyp */ | |
2719 | + { "elr_el2", CPEN_(4,C0,1), 0 }, | |
2720 | + { "sp_el1", CPEN_(4,C1,0), 0 }, | |
2721 | + { "spsr_irq", CPEN_(4,C3,0), 0 }, | |
2722 | + { "spsr_abt", CPEN_(4,C3,1), 0 }, | |
2723 | + { "spsr_und", CPEN_(4,C3,2), 0 }, | |
2724 | + { "spsr_fiq", CPEN_(4,C3,3), 0 }, | |
2725 | + { "spsr_el3", CPEN_(6,C0,0), 0 }, | |
2726 | + { "elr_el3", CPEN_(6,C0,1), 0 }, | |
2727 | + { "sp_el2", CPEN_(6,C1,0), 0 }, | |
2728 | + { "spsr_svc", CPEN_(0,C0,0), F_DEPRECATED }, /* = spsr_el1 */ | |
2729 | + { "spsr_hyp", CPEN_(4,C0,0), F_DEPRECATED }, /* = spsr_el2 */ | |
2730 | + { "midr_el1", CPENC(3,0,C0,C0,0), 0 }, /* RO */ | |
2731 | + { "ctr_el0", CPENC(3,3,C0,C0,1), 0 }, /* RO */ | |
2732 | + { "mpidr_el1", CPENC(3,0,C0,C0,5), 0 }, /* RO */ | |
2733 | + { "revidr_el1", CPENC(3,0,C0,C0,6), 0 }, /* RO */ | |
2734 | + { "aidr_el1", CPENC(3,1,C0,C0,7), 0 }, /* RO */ | |
2735 | + { "dczid_el0", CPENC(3,3,C0,C0,7), 0 }, /* RO */ | |
2736 | + { "id_dfr0_el1", CPENC(3,0,C0,C1,2), 0 }, /* RO */ | |
2737 | + { "id_pfr0_el1", CPENC(3,0,C0,C1,0), 0 }, /* RO */ | |
2738 | + { "id_pfr1_el1", CPENC(3,0,C0,C1,1), 0 }, /* RO */ | |
2739 | + { "id_afr0_el1", CPENC(3,0,C0,C1,3), 0 }, /* RO */ | |
2740 | + { "id_mmfr0_el1", CPENC(3,0,C0,C1,4), 0 }, /* RO */ | |
2741 | + { "id_mmfr1_el1", CPENC(3,0,C0,C1,5), 0 }, /* RO */ | |
2742 | + { "id_mmfr2_el1", CPENC(3,0,C0,C1,6), 0 }, /* RO */ | |
2743 | + { "id_mmfr3_el1", CPENC(3,0,C0,C1,7), 0 }, /* RO */ | |
2744 | + { "id_isar0_el1", CPENC(3,0,C0,C2,0), 0 }, /* RO */ | |
2745 | + { "id_isar1_el1", CPENC(3,0,C0,C2,1), 0 }, /* RO */ | |
2746 | + { "id_isar2_el1", CPENC(3,0,C0,C2,2), 0 }, /* RO */ | |
2747 | + { "id_isar3_el1", CPENC(3,0,C0,C2,3), 0 }, /* RO */ | |
2748 | + { "id_isar4_el1", CPENC(3,0,C0,C2,4), 0 }, /* RO */ | |
2749 | + { "id_isar5_el1", CPENC(3,0,C0,C2,5), 0 }, /* RO */ | |
2750 | + { "mvfr0_el1", CPENC(3,0,C0,C3,0), 0 }, /* RO */ | |
2751 | + { "mvfr1_el1", CPENC(3,0,C0,C3,1), 0 }, /* RO */ | |
2752 | + { "mvfr2_el1", CPENC(3,0,C0,C3,2), 0 }, /* RO */ | |
2753 | + { "ccsidr_el1", CPENC(3,1,C0,C0,0), 0 }, /* RO */ | |
2754 | + { "id_aa64pfr0_el1", CPENC(3,0,C0,C4,0), 0 }, /* RO */ | |
2755 | + { "id_aa64pfr1_el1", CPENC(3,0,C0,C4,1), 0 }, /* RO */ | |
2756 | + { "id_aa64dfr0_el1", CPENC(3,0,C0,C5,0), 0 }, /* RO */ | |
2757 | + { "id_aa64dfr1_el1", CPENC(3,0,C0,C5,1), 0 }, /* RO */ | |
2758 | + { "id_aa64isar0_el1", CPENC(3,0,C0,C6,0), 0 }, /* RO */ | |
2759 | + { "id_aa64isar1_el1", CPENC(3,0,C0,C6,1), 0 }, /* RO */ | |
2760 | + { "id_aa64mmfr0_el1", CPENC(3,0,C0,C7,0), 0 }, /* RO */ | |
2761 | + { "id_aa64mmfr1_el1", CPENC(3,0,C0,C7,1), 0 }, /* RO */ | |
2762 | + { "id_aa64afr0_el1", CPENC(3,0,C0,C5,4), 0 }, /* RO */ | |
2763 | + { "id_aa64afr1_el1", CPENC(3,0,C0,C5,5), 0 }, /* RO */ | |
2764 | + { "clidr_el1", CPENC(3,1,C0,C0,1), 0 }, /* RO */ | |
2765 | + { "csselr_el1", CPENC(3,2,C0,C0,0), 0 }, /* RO */ | |
2766 | + { "vpidr_el2", CPENC(3,4,C0,C0,0), 0 }, | |
2767 | + { "vmpidr_el2", CPENC(3,4,C0,C0,5), 0 }, | |
2768 | + { "sctlr_el1", CPENC(3,0,C1,C0,0), 0 }, | |
2769 | + { "sctlr_el2", CPENC(3,4,C1,C0,0), 0 }, | |
2770 | + { "sctlr_el3", CPENC(3,6,C1,C0,0), 0 }, | |
2771 | + { "actlr_el1", CPENC(3,0,C1,C0,1), 0 }, | |
2772 | + { "actlr_el2", CPENC(3,4,C1,C0,1), 0 }, | |
2773 | + { "actlr_el3", CPENC(3,6,C1,C0,1), 0 }, | |
2774 | + { "cpacr_el1", CPENC(3,0,C1,C0,2), 0 }, | |
2775 | + { "cptr_el2", CPENC(3,4,C1,C1,2), 0 }, | |
2776 | + { "cptr_el3", CPENC(3,6,C1,C1,2), 0 }, | |
2777 | + { "scr_el3", CPENC(3,6,C1,C1,0), 0 }, | |
2778 | + { "hcr_el2", CPENC(3,4,C1,C1,0), 0 }, | |
2779 | + { "mdcr_el2", CPENC(3,4,C1,C1,1), 0 }, | |
2780 | + { "mdcr_el3", CPENC(3,6,C1,C3,1), 0 }, | |
2781 | + { "hstr_el2", CPENC(3,4,C1,C1,3), 0 }, | |
2782 | + { "hacr_el2", CPENC(3,4,C1,C1,7), 0 }, | |
2783 | + { "ttbr0_el1", CPENC(3,0,C2,C0,0), 0 }, | |
2784 | + { "ttbr1_el1", CPENC(3,0,C2,C0,1), 0 }, | |
2785 | + { "ttbr0_el2", CPENC(3,4,C2,C0,0), 0 }, | |
2786 | + { "ttbr0_el3", CPENC(3,6,C2,C0,0), 0 }, | |
2787 | + { "vttbr_el2", CPENC(3,4,C2,C1,0), 0 }, | |
2788 | + { "tcr_el1", CPENC(3,0,C2,C0,2), 0 }, | |
2789 | + { "tcr_el2", CPENC(3,4,C2,C0,2), 0 }, | |
2790 | + { "tcr_el3", CPENC(3,6,C2,C0,2), 0 }, | |
2791 | + { "vtcr_el2", CPENC(3,4,C2,C1,2), 0 }, | |
2792 | + { "afsr0_el1", CPENC(3,0,C5,C1,0), 0 }, | |
2793 | + { "afsr1_el1", CPENC(3,0,C5,C1,1), 0 }, | |
2794 | + { "afsr0_el2", CPENC(3,4,C5,C1,0), 0 }, | |
2795 | + { "afsr1_el2", CPENC(3,4,C5,C1,1), 0 }, | |
2796 | + { "afsr0_el3", CPENC(3,6,C5,C1,0), 0 }, | |
2797 | + { "afsr1_el3", CPENC(3,6,C5,C1,1), 0 }, | |
2798 | + { "esr_el1", CPENC(3,0,C5,C2,0), 0 }, | |
2799 | + { "esr_el2", CPENC(3,4,C5,C2,0), 0 }, | |
2800 | + { "esr_el3", CPENC(3,6,C5,C2,0), 0 }, | |
2801 | + { "fpexc32_el2", CPENC(3,4,C5,C3,0), 0 }, | |
2802 | + { "far_el1", CPENC(3,0,C6,C0,0), 0 }, | |
2803 | + { "far_el2", CPENC(3,4,C6,C0,0), 0 }, | |
2804 | + { "far_el3", CPENC(3,6,C6,C0,0), 0 }, | |
2805 | + { "hpfar_el2", CPENC(3,4,C6,C0,4), 0 }, | |
2806 | + { "par_el1", CPENC(3,0,C7,C4,0), 0 }, | |
2807 | + { "mair_el1", CPENC(3,0,C10,C2,0), 0 }, | |
2808 | + { "mair_el2", CPENC(3,4,C10,C2,0), 0 }, | |
2809 | + { "mair_el3", CPENC(3,6,C10,C2,0), 0 }, | |
2810 | + { "amair_el1", CPENC(3,0,C10,C3,0), 0 }, | |
2811 | + { "amair_el2", CPENC(3,4,C10,C3,0), 0 }, | |
2812 | + { "amair_el3", CPENC(3,6,C10,C3,0), 0 }, | |
2813 | + { "vbar_el1", CPENC(3,0,C12,C0,0), 0 }, | |
2814 | + { "vbar_el2", CPENC(3,4,C12,C0,0), 0 }, | |
2815 | + { "vbar_el3", CPENC(3,6,C12,C0,0), 0 }, | |
2816 | + { "rvbar_el1", CPENC(3,0,C12,C0,1), 0 }, /* RO */ | |
2817 | + { "rvbar_el2", CPENC(3,4,C12,C0,1), 0 }, /* RO */ | |
2818 | + { "rvbar_el3", CPENC(3,6,C12,C0,1), 0 }, /* RO */ | |
2819 | + { "rmr_el1", CPENC(3,0,C12,C0,2), 0 }, | |
2820 | + { "rmr_el2", CPENC(3,4,C12,C0,2), 0 }, | |
2821 | + { "rmr_el3", CPENC(3,6,C12,C0,2), 0 }, | |
2822 | + { "isr_el1", CPENC(3,0,C12,C1,0), 0 }, /* RO */ | |
2823 | + { "contextidr_el1", CPENC(3,0,C13,C0,1), 0 }, | |
2824 | + { "tpidr_el0", CPENC(3,3,C13,C0,2), 0 }, | |
2825 | + { "tpidrro_el0", CPENC(3,3,C13,C0,3), 0 }, /* RO */ | |
2826 | + { "tpidr_el1", CPENC(3,0,C13,C0,4), 0 }, | |
2827 | + { "tpidr_el2", CPENC(3,4,C13,C0,2), 0 }, | |
2828 | + { "tpidr_el3", CPENC(3,6,C13,C0,2), 0 }, | |
2829 | + { "teecr32_el1", CPENC(2,2,C0, C0,0), 0 }, /* See section 3.9.7.1 */ | |
2830 | + { "cntfrq_el0", CPENC(3,3,C14,C0,0), 0 }, /* RO */ | |
2831 | + { "cntpct_el0", CPENC(3,3,C14,C0,1), 0 }, /* RO */ | |
2832 | + { "cntvct_el0", CPENC(3,3,C14,C0,2), 0 }, /* RO */ | |
2833 | + { "cntvoff_el2", CPENC(3,4,C14,C0,3), 0 }, | |
2834 | + { "cntkctl_el1", CPENC(3,0,C14,C1,0), 0 }, | |
2835 | + { "cnthctl_el2", CPENC(3,4,C14,C1,0), 0 }, | |
2836 | + { "cntp_tval_el0", CPENC(3,3,C14,C2,0), 0 }, | |
2837 | + { "cntp_ctl_el0", CPENC(3,3,C14,C2,1), 0 }, | |
2838 | + { "cntp_cval_el0", CPENC(3,3,C14,C2,2), 0 }, | |
2839 | + { "cntv_tval_el0", CPENC(3,3,C14,C3,0), 0 }, | |
2840 | + { "cntv_ctl_el0", CPENC(3,3,C14,C3,1), 0 }, | |
2841 | + { "cntv_cval_el0", CPENC(3,3,C14,C3,2), 0 }, | |
2842 | + { "cnthp_tval_el2", CPENC(3,4,C14,C2,0), 0 }, | |
2843 | + { "cnthp_ctl_el2", CPENC(3,4,C14,C2,1), 0 }, | |
2844 | + { "cnthp_cval_el2", CPENC(3,4,C14,C2,2), 0 }, | |
2845 | + { "cntps_tval_el1", CPENC(3,7,C14,C2,0), 0 }, | |
2846 | + { "cntps_ctl_el1", CPENC(3,7,C14,C2,1), 0 }, | |
2847 | + { "cntps_cval_el1", CPENC(3,7,C14,C2,2), 0 }, | |
2848 | + { "dacr32_el2", CPENC(3,4,C3,C0,0), 0 }, | |
2849 | + { "ifsr32_el2", CPENC(3,4,C5,C0,1), 0 }, | |
2850 | + { "teehbr32_el1", CPENC(2,2,C1,C0,0), 0 }, | |
2851 | + { "sder32_el3", CPENC(3,6,C1,C1,1), 0 }, | |
2852 | + { "mdscr_el1", CPENC(2,0,C0, C2, 2), 0 }, | |
2853 | + { "mdccsr_el0", CPENC(2,3,C0, C1, 0), 0 }, /* r */ | |
2854 | + { "mdccint_el1", CPENC(2,0,C0, C2, 0), 0 }, | |
2855 | + { "dbgdtr_el0", CPENC(2,3,C0, C4, 0), 0 }, | |
2856 | + { "dbgdtrrx_el0", CPENC(2,3,C0, C5, 0), 0 }, /* r */ | |
2857 | + { "dbgdtrtx_el0", CPENC(2,3,C0, C5, 0), 0 }, /* w */ | |
2858 | + { "osdtrrx_el1", CPENC(2,0,C0, C0, 2), 0 }, /* r */ | |
2859 | + { "osdtrtx_el1", CPENC(2,0,C0, C3, 2), 0 }, /* w */ | |
2860 | + { "oseccr_el1", CPENC(2,0,C0, C6, 2), 0 }, | |
2861 | + { "dbgvcr32_el2", CPENC(2,4,C0, C7, 0), 0 }, | |
2862 | + { "dbgbvr0_el1", CPENC(2,0,C0, C0, 4), 0 }, | |
2863 | + { "dbgbvr1_el1", CPENC(2,0,C0, C1, 4), 0 }, | |
2864 | + { "dbgbvr2_el1", CPENC(2,0,C0, C2, 4), 0 }, | |
2865 | + { "dbgbvr3_el1", CPENC(2,0,C0, C3, 4), 0 }, | |
2866 | + { "dbgbvr4_el1", CPENC(2,0,C0, C4, 4), 0 }, | |
2867 | + { "dbgbvr5_el1", CPENC(2,0,C0, C5, 4), 0 }, | |
2868 | + { "dbgbvr6_el1", CPENC(2,0,C0, C6, 4), 0 }, | |
2869 | + { "dbgbvr7_el1", CPENC(2,0,C0, C7, 4), 0 }, | |
2870 | + { "dbgbvr8_el1", CPENC(2,0,C0, C8, 4), 0 }, | |
2871 | + { "dbgbvr9_el1", CPENC(2,0,C0, C9, 4), 0 }, | |
2872 | + { "dbgbvr10_el1", CPENC(2,0,C0, C10,4), 0 }, | |
2873 | + { "dbgbvr11_el1", CPENC(2,0,C0, C11,4), 0 }, | |
2874 | + { "dbgbvr12_el1", CPENC(2,0,C0, C12,4), 0 }, | |
2875 | + { "dbgbvr13_el1", CPENC(2,0,C0, C13,4), 0 }, | |
2876 | + { "dbgbvr14_el1", CPENC(2,0,C0, C14,4), 0 }, | |
2877 | + { "dbgbvr15_el1", CPENC(2,0,C0, C15,4), 0 }, | |
2878 | + { "dbgbcr0_el1", CPENC(2,0,C0, C0, 5), 0 }, | |
2879 | + { "dbgbcr1_el1", CPENC(2,0,C0, C1, 5), 0 }, | |
2880 | + { "dbgbcr2_el1", CPENC(2,0,C0, C2, 5), 0 }, | |
2881 | + { "dbgbcr3_el1", CPENC(2,0,C0, C3, 5), 0 }, | |
2882 | + { "dbgbcr4_el1", CPENC(2,0,C0, C4, 5), 0 }, | |
2883 | + { "dbgbcr5_el1", CPENC(2,0,C0, C5, 5), 0 }, | |
2884 | + { "dbgbcr6_el1", CPENC(2,0,C0, C6, 5), 0 }, | |
2885 | + { "dbgbcr7_el1", CPENC(2,0,C0, C7, 5), 0 }, | |
2886 | + { "dbgbcr8_el1", CPENC(2,0,C0, C8, 5), 0 }, | |
2887 | + { "dbgbcr9_el1", CPENC(2,0,C0, C9, 5), 0 }, | |
2888 | + { "dbgbcr10_el1", CPENC(2,0,C0, C10,5), 0 }, | |
2889 | + { "dbgbcr11_el1", CPENC(2,0,C0, C11,5), 0 }, | |
2890 | + { "dbgbcr12_el1", CPENC(2,0,C0, C12,5), 0 }, | |
2891 | + { "dbgbcr13_el1", CPENC(2,0,C0, C13,5), 0 }, | |
2892 | + { "dbgbcr14_el1", CPENC(2,0,C0, C14,5), 0 }, | |
2893 | + { "dbgbcr15_el1", CPENC(2,0,C0, C15,5), 0 }, | |
2894 | + { "dbgwvr0_el1", CPENC(2,0,C0, C0, 6), 0 }, | |
2895 | + { "dbgwvr1_el1", CPENC(2,0,C0, C1, 6), 0 }, | |
2896 | + { "dbgwvr2_el1", CPENC(2,0,C0, C2, 6), 0 }, | |
2897 | + { "dbgwvr3_el1", CPENC(2,0,C0, C3, 6), 0 }, | |
2898 | + { "dbgwvr4_el1", CPENC(2,0,C0, C4, 6), 0 }, | |
2899 | + { "dbgwvr5_el1", CPENC(2,0,C0, C5, 6), 0 }, | |
2900 | + { "dbgwvr6_el1", CPENC(2,0,C0, C6, 6), 0 }, | |
2901 | + { "dbgwvr7_el1", CPENC(2,0,C0, C7, 6), 0 }, | |
2902 | + { "dbgwvr8_el1", CPENC(2,0,C0, C8, 6), 0 }, | |
2903 | + { "dbgwvr9_el1", CPENC(2,0,C0, C9, 6), 0 }, | |
2904 | + { "dbgwvr10_el1", CPENC(2,0,C0, C10,6), 0 }, | |
2905 | + { "dbgwvr11_el1", CPENC(2,0,C0, C11,6), 0 }, | |
2906 | + { "dbgwvr12_el1", CPENC(2,0,C0, C12,6), 0 }, | |
2907 | + { "dbgwvr13_el1", CPENC(2,0,C0, C13,6), 0 }, | |
2908 | + { "dbgwvr14_el1", CPENC(2,0,C0, C14,6), 0 }, | |
2909 | + { "dbgwvr15_el1", CPENC(2,0,C0, C15,6), 0 }, | |
2910 | + { "dbgwcr0_el1", CPENC(2,0,C0, C0, 7), 0 }, | |
2911 | + { "dbgwcr1_el1", CPENC(2,0,C0, C1, 7), 0 }, | |
2912 | + { "dbgwcr2_el1", CPENC(2,0,C0, C2, 7), 0 }, | |
2913 | + { "dbgwcr3_el1", CPENC(2,0,C0, C3, 7), 0 }, | |
2914 | + { "dbgwcr4_el1", CPENC(2,0,C0, C4, 7), 0 }, | |
2915 | + { "dbgwcr5_el1", CPENC(2,0,C0, C5, 7), 0 }, | |
2916 | + { "dbgwcr6_el1", CPENC(2,0,C0, C6, 7), 0 }, | |
2917 | + { "dbgwcr7_el1", CPENC(2,0,C0, C7, 7), 0 }, | |
2918 | + { "dbgwcr8_el1", CPENC(2,0,C0, C8, 7), 0 }, | |
2919 | + { "dbgwcr9_el1", CPENC(2,0,C0, C9, 7), 0 }, | |
2920 | + { "dbgwcr10_el1", CPENC(2,0,C0, C10,7), 0 }, | |
2921 | + { "dbgwcr11_el1", CPENC(2,0,C0, C11,7), 0 }, | |
2922 | + { "dbgwcr12_el1", CPENC(2,0,C0, C12,7), 0 }, | |
2923 | + { "dbgwcr13_el1", CPENC(2,0,C0, C13,7), 0 }, | |
2924 | + { "dbgwcr14_el1", CPENC(2,0,C0, C14,7), 0 }, | |
2925 | + { "dbgwcr15_el1", CPENC(2,0,C0, C15,7), 0 }, | |
2926 | + { "mdrar_el1", CPENC(2,0,C1, C0, 0), 0 }, /* r */ | |
2927 | + { "oslar_el1", CPENC(2,0,C1, C0, 4), 0 }, /* w */ | |
2928 | + { "oslsr_el1", CPENC(2,0,C1, C1, 4), 0 }, /* r */ | |
2929 | + { "osdlr_el1", CPENC(2,0,C1, C3, 4), 0 }, | |
2930 | + { "dbgprcr_el1", CPENC(2,0,C1, C4, 4), 0 }, | |
2931 | + { "dbgclaimset_el1", CPENC(2,0,C7, C8, 6), 0 }, | |
2932 | + { "dbgclaimclr_el1", CPENC(2,0,C7, C9, 6), 0 }, | |
2933 | + { "dbgauthstatus_el1", CPENC(2,0,C7, C14,6), 0 }, /* r */ | |
2934 | + | |
2935 | + { "pmcr_el0", CPENC(3,3,C9,C12, 0), 0 }, | |
2936 | + { "pmcntenset_el0", CPENC(3,3,C9,C12, 1), 0 }, | |
2937 | + { "pmcntenclr_el0", CPENC(3,3,C9,C12, 2), 0 }, | |
2938 | + { "pmovsclr_el0", CPENC(3,3,C9,C12, 3), 0 }, | |
2939 | + { "pmswinc_el0", CPENC(3,3,C9,C12, 4), 0 }, /* w */ | |
2940 | + { "pmselr_el0", CPENC(3,3,C9,C12, 5), 0 }, | |
2941 | + { "pmceid0_el0", CPENC(3,3,C9,C12, 6), 0 }, /* r */ | |
2942 | + { "pmceid1_el0", CPENC(3,3,C9,C12, 7), 0 }, /* r */ | |
2943 | + { "pmccntr_el0", CPENC(3,3,C9,C13, 0), 0 }, | |
2944 | + { "pmxevtyper_el0", CPENC(3,3,C9,C13, 1), 0 }, | |
2945 | + { "pmxevcntr_el0", CPENC(3,3,C9,C13, 2), 0 }, | |
2946 | + { "pmuserenr_el0", CPENC(3,3,C9,C14, 0), 0 }, | |
2947 | + { "pmintenset_el1", CPENC(3,0,C9,C14, 1), 0 }, | |
2948 | + { "pmintenclr_el1", CPENC(3,0,C9,C14, 2), 0 }, | |
2949 | + { "pmovsset_el0", CPENC(3,3,C9,C14, 3), 0 }, | |
2950 | + { "pmevcntr0_el0", CPENC(3,3,C14,C8, 0), 0 }, | |
2951 | + { "pmevcntr1_el0", CPENC(3,3,C14,C8, 1), 0 }, | |
2952 | + { "pmevcntr2_el0", CPENC(3,3,C14,C8, 2), 0 }, | |
2953 | + { "pmevcntr3_el0", CPENC(3,3,C14,C8, 3), 0 }, | |
2954 | + { "pmevcntr4_el0", CPENC(3,3,C14,C8, 4), 0 }, | |
2955 | + { "pmevcntr5_el0", CPENC(3,3,C14,C8, 5), 0 }, | |
2956 | + { "pmevcntr6_el0", CPENC(3,3,C14,C8, 6), 0 }, | |
2957 | + { "pmevcntr7_el0", CPENC(3,3,C14,C8, 7), 0 }, | |
2958 | + { "pmevcntr8_el0", CPENC(3,3,C14,C9, 0), 0 }, | |
2959 | + { "pmevcntr9_el0", CPENC(3,3,C14,C9, 1), 0 }, | |
2960 | + { "pmevcntr10_el0", CPENC(3,3,C14,C9, 2), 0 }, | |
2961 | + { "pmevcntr11_el0", CPENC(3,3,C14,C9, 3), 0 }, | |
2962 | + { "pmevcntr12_el0", CPENC(3,3,C14,C9, 4), 0 }, | |
2963 | + { "pmevcntr13_el0", CPENC(3,3,C14,C9, 5), 0 }, | |
2964 | + { "pmevcntr14_el0", CPENC(3,3,C14,C9, 6), 0 }, | |
2965 | + { "pmevcntr15_el0", CPENC(3,3,C14,C9, 7), 0 }, | |
2966 | + { "pmevcntr16_el0", CPENC(3,3,C14,C10,0), 0 }, | |
2967 | + { "pmevcntr17_el0", CPENC(3,3,C14,C10,1), 0 }, | |
2968 | + { "pmevcntr18_el0", CPENC(3,3,C14,C10,2), 0 }, | |
2969 | + { "pmevcntr19_el0", CPENC(3,3,C14,C10,3), 0 }, | |
2970 | + { "pmevcntr20_el0", CPENC(3,3,C14,C10,4), 0 }, | |
2971 | + { "pmevcntr21_el0", CPENC(3,3,C14,C10,5), 0 }, | |
2972 | + { "pmevcntr22_el0", CPENC(3,3,C14,C10,6), 0 }, | |
2973 | + { "pmevcntr23_el0", CPENC(3,3,C14,C10,7), 0 }, | |
2974 | + { "pmevcntr24_el0", CPENC(3,3,C14,C11,0), 0 }, | |
2975 | + { "pmevcntr25_el0", CPENC(3,3,C14,C11,1), 0 }, | |
2976 | + { "pmevcntr26_el0", CPENC(3,3,C14,C11,2), 0 }, | |
2977 | + { "pmevcntr27_el0", CPENC(3,3,C14,C11,3), 0 }, | |
2978 | + { "pmevcntr28_el0", CPENC(3,3,C14,C11,4), 0 }, | |
2979 | + { "pmevcntr29_el0", CPENC(3,3,C14,C11,5), 0 }, | |
2980 | + { "pmevcntr30_el0", CPENC(3,3,C14,C11,6), 0 }, | |
2981 | + { "pmevtyper0_el0", CPENC(3,3,C14,C12,0), 0 }, | |
2982 | + { "pmevtyper1_el0", CPENC(3,3,C14,C12,1), 0 }, | |
2983 | + { "pmevtyper2_el0", CPENC(3,3,C14,C12,2), 0 }, | |
2984 | + { "pmevtyper3_el0", CPENC(3,3,C14,C12,3), 0 }, | |
2985 | + { "pmevtyper4_el0", CPENC(3,3,C14,C12,4), 0 }, | |
2986 | + { "pmevtyper5_el0", CPENC(3,3,C14,C12,5), 0 }, | |
2987 | + { "pmevtyper6_el0", CPENC(3,3,C14,C12,6), 0 }, | |
2988 | + { "pmevtyper7_el0", CPENC(3,3,C14,C12,7), 0 }, | |
2989 | + { "pmevtyper8_el0", CPENC(3,3,C14,C13,0), 0 }, | |
2990 | + { "pmevtyper9_el0", CPENC(3,3,C14,C13,1), 0 }, | |
2991 | + { "pmevtyper10_el0", CPENC(3,3,C14,C13,2), 0 }, | |
2992 | + { "pmevtyper11_el0", CPENC(3,3,C14,C13,3), 0 }, | |
2993 | + { "pmevtyper12_el0", CPENC(3,3,C14,C13,4), 0 }, | |
2994 | + { "pmevtyper13_el0", CPENC(3,3,C14,C13,5), 0 }, | |
2995 | + { "pmevtyper14_el0", CPENC(3,3,C14,C13,6), 0 }, | |
2996 | + { "pmevtyper15_el0", CPENC(3,3,C14,C13,7), 0 }, | |
2997 | + { "pmevtyper16_el0", CPENC(3,3,C14,C14,0), 0 }, | |
2998 | + { "pmevtyper17_el0", CPENC(3,3,C14,C14,1), 0 }, | |
2999 | + { "pmevtyper18_el0", CPENC(3,3,C14,C14,2), 0 }, | |
3000 | + { "pmevtyper19_el0", CPENC(3,3,C14,C14,3), 0 }, | |
3001 | + { "pmevtyper20_el0", CPENC(3,3,C14,C14,4), 0 }, | |
3002 | + { "pmevtyper21_el0", CPENC(3,3,C14,C14,5), 0 }, | |
3003 | + { "pmevtyper22_el0", CPENC(3,3,C14,C14,6), 0 }, | |
3004 | + { "pmevtyper23_el0", CPENC(3,3,C14,C14,7), 0 }, | |
3005 | + { "pmevtyper24_el0", CPENC(3,3,C14,C15,0), 0 }, | |
3006 | + { "pmevtyper25_el0", CPENC(3,3,C14,C15,1), 0 }, | |
3007 | + { "pmevtyper26_el0", CPENC(3,3,C14,C15,2), 0 }, | |
3008 | + { "pmevtyper27_el0", CPENC(3,3,C14,C15,3), 0 }, | |
3009 | + { "pmevtyper28_el0", CPENC(3,3,C14,C15,4), 0 }, | |
3010 | + { "pmevtyper29_el0", CPENC(3,3,C14,C15,5), 0 }, | |
3011 | + { "pmevtyper30_el0", CPENC(3,3,C14,C15,6), 0 }, | |
3012 | + { "pmccfiltr_el0", CPENC(3,3,C14,C15,7), 0 }, | |
3013 | + { 0, CPENC(0,0,0,0,0), 0 }, | |
3008 | 3014 | }; |
3009 | 3015 | |
3016 | +bfd_boolean | |
3017 | +aarch64_sys_reg_deprecated_p (const aarch64_sys_reg *reg) | |
3018 | +{ | |
3019 | + return (reg->flags & F_DEPRECATED) != 0; | |
3020 | +} | |
3021 | + | |
3010 | 3022 | const struct aarch64_name_value_pair aarch64_pstatefields [] = |
3011 | 3023 | { |
3012 | 3024 | { "spsel", 0x05 }, |