提交: 8b353c47b70568ab9f0cfd619b7a19e931c2b0c8 - binutils_os216 (git)

GNU Binutils with patches for OS216

Commit MetaInfo

• 修订版: 8b353c47b70568ab9f0cfd619b7a19e931c2b0c8 (tree)
• 时间: 2017-04-24 21:31:31
• 作者: Jose E. Marchesi <jose.marchesi@orac...>
• Commiter: Jose E. Marchesi

Log Message

ld: fix regressions with rett instructions in sparc tests.

A few tests in the ld testsuite were expecting the disassembler to
emit rett' instructions in V9. This patch updates the tests to
expect return' instead.

ld/ChangeLog:

2017-04-24 Jose E. Marchesi <[e-mail]>

* testsuite/ld-sparc/tlssunbin64.dd: Expect return' instructions
instead of rett' in V9.
* testsuite/ld-sparc/tlssunnopic64.dd: Likewise.
* testsuite/ld-sparc/tlssunpic64.dd: Likewise.

更改概述

• modified: ld/ChangeLog
• modified: ld/testsuite/ld-sparc/tlssunbin64.dd
• modified: ld/testsuite/ld-sparc/tlssunnopic64.dd
• modified: ld/testsuite/ld-sparc/tlssunpic64.dd

差异

--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,10 @@
[phone]  Jose E. Marchesi  <[e-mail]>
+
+	* testsuite/ld-sparc/tlssunbin64.dd: Expect `return' instructions
+	instead of `rett' in V9.
+	* testsuite/ld-sparc/tlssunnopic64.dd: Likewise.
+	* testsuite/ld-sparc/tlssunpic64.dd: Likewise.
+
 2017-04-21  H.J. Lu  <[e-mail]>
 
 	PR ld/21402

--- a/ld/testsuite/ld-sparc/tlssunbin64.dd
+++ b/ld/testsuite/ld-sparc/tlssunbin64.dd
@@ -165,7 +165,7 @@ Disassembly of section .text:
  +10125c:	01 00 00 00 	nop *
  +101260:	01 00 00 00 	nop *
  +101264:	01 00 00 00 	nop *
- +101268:	81 cf e0 08 	rett  %i7 \+ 8
+ +101268:	81 cf e0 08 	return  %i7 \+ 8
  +10126c:	01 00 00 00 	nop *
 #...
 

--- a/ld/testsuite/ld-sparc/tlssunnopic64.dd
+++ b/ld/testsuite/ld-sparc/tlssunnopic64.dd
@@ -83,6 +83,6 @@ Disassembly of section .text:
  +1118:	01 00 00 00 	nop *
  +111c:	01 00 00 00 	nop *
  +1120:	01 00 00 00 	nop *
- +1124:	81 cf e0 08 	rett  %i7 \+ 8
+ +1124:	81 cf e0 08 	return  %i7 \+ 8
  +1128:	01 00 00 00 	nop *
 #pass

--- a/ld/testsuite/ld-sparc/tlssunpic64.dd
+++ b/ld/testsuite/ld-sparc/tlssunpic64.dd
@@ -215,6 +215,6 @@ Disassembly of section .text:
  +1320:	01 00 00 00 	nop *
  +1324:	01 00 00 00 	nop *
  +1328:	01 00 00 00 	nop *
- +132c:	81 cf e0 08 	rett  %i7 \+ 8
+ +132c:	81 cf e0 08 	return  %i7 \+ 8
  +1330:	01 00 00 00 	nop *
 #pass