hardware/intel/common/libva
修订版 | f578063d4a1db156ef10f6bab3565f37cb7a5bd5 (tree) |
---|---|
时间 | 2010-03-31 14:52:30 |
作者 | Xiang, Haihao <haihao.xiang@inte...> |
Commiter | Xiang, Haihao |
i965_drv_video: move DMV buffer to private data
@@ -26,6 +26,7 @@ | ||
26 | 26 | * |
27 | 27 | */ |
28 | 28 | #include <stdio.h> |
29 | +#include <stdlib.h> | |
29 | 30 | #include <string.h> |
30 | 31 | #include <assert.h> |
31 | 32 |
@@ -40,6 +41,49 @@ | ||
40 | 41 | #include "i965_media_h264.h" |
41 | 42 | #include "i965_media.h" |
42 | 43 | |
44 | +static void | |
45 | +i965_avc_bsd_free_private_surface_data(void **data) | |
46 | +{ | |
47 | + struct i965_avc_bsd_surface *avc_bsd_surface = *data; | |
48 | + | |
49 | + if (!avc_bsd_surface) | |
50 | + return; | |
51 | + | |
52 | + dri_bo_unreference(avc_bsd_surface->direct_mv_wr_top_bo); | |
53 | + avc_bsd_surface->direct_mv_wr_top_bo = NULL; | |
54 | + dri_bo_unreference(avc_bsd_surface->direct_mv_wr_bottom_bo); | |
55 | + avc_bsd_surface->direct_mv_wr_bottom_bo = NULL; | |
56 | + free(avc_bsd_surface); | |
57 | + *data = NULL; | |
58 | +} | |
59 | + | |
60 | +static void | |
61 | +i965_avc_bsd_initialize_private_surface_data(VADriverContextP ctx, struct object_surface *obj_surface) | |
62 | +{ | |
63 | + struct i965_driver_data *i965 = i965_driver_data(ctx); | |
64 | + struct i965_avc_bsd_surface *avc_bsd_surface = obj_surface->private_data; | |
65 | + | |
66 | + obj_surface->free_private_data = i965_avc_bsd_free_private_surface_data; | |
67 | + | |
68 | + if (!avc_bsd_surface) { | |
69 | + avc_bsd_surface = calloc(sizeof(struct i965_avc_bsd_surface), 1); | |
70 | + | |
71 | + avc_bsd_surface->direct_mv_wr_top_bo = dri_bo_alloc(i965->intel.bufmgr, | |
72 | + "direct mv wr top", | |
73 | + 0x90000, | |
74 | + 64); | |
75 | + assert(avc_bsd_surface->direct_mv_wr_top_bo); | |
76 | + avc_bsd_surface->direct_mv_wr_bottom_bo = dri_bo_alloc(i965->intel.bufmgr, | |
77 | + "direct mv wr bottom", | |
78 | + 0x90000, | |
79 | + 64); | |
80 | + assert(avc_bsd_surface->direct_mv_wr_bottom_bo); | |
81 | + obj_surface->private_data = avc_bsd_surface; | |
82 | + } | |
83 | + | |
84 | + avc_bsd_surface->direct_mv_flag = -1; | |
85 | +} | |
86 | + | |
43 | 87 | static void |
44 | 88 | i965_bsd_ind_obj_base_address(VADriverContextP ctx, struct decode_state *decode_state) |
45 | 89 | { |
@@ -367,6 +411,7 @@ i965_avc_bsd_buf_base_state(VADriverContextP ctx, struct decode_state *decode_st | ||
367 | 411 | VAPictureParameterBufferH264 *pic_param; |
368 | 412 | VAPictureH264 *va_pic; |
369 | 413 | struct object_surface *obj_surface; |
414 | + struct i965_avc_bsd_surface *avc_bsd_surface; | |
370 | 415 | |
371 | 416 | assert(decode_state->pic_param && decode_state->pic_param->buffer); |
372 | 417 | pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; |
@@ -399,17 +444,20 @@ i965_avc_bsd_buf_base_state(VADriverContextP ctx, struct decode_state *decode_st | ||
399 | 444 | if (!(va_pic->flags & VA_PICTURE_H264_INVALID)) { |
400 | 445 | obj_surface = SURFACE(va_pic->picture_id); |
401 | 446 | assert(obj_surface); |
402 | - OUT_BCS_RELOC(ctx, obj_surface->direct_mv_wr_top_bo, | |
447 | + avc_bsd_surface = obj_surface->private_data; | |
448 | + assert(avc_bsd_surface); | |
449 | + assert(avc_bsd_surface->direct_mv_flag != -1); | |
450 | + | |
451 | + OUT_BCS_RELOC(ctx, avc_bsd_surface->direct_mv_wr_top_bo, | |
403 | 452 | I915_GEM_DOMAIN_INSTRUCTION, 0, |
404 | 453 | 0); |
405 | 454 | |
406 | - if (pic_param->pic_fields.bits.field_pic_flag && | |
407 | - !pic_param->seq_fields.bits.direct_8x8_inference_flag) | |
408 | - OUT_BCS_RELOC(ctx, obj_surface->direct_mv_wr_bottom_bo, | |
455 | + if (avc_bsd_surface->direct_mv_flag == 1) | |
456 | + OUT_BCS_RELOC(ctx, avc_bsd_surface->direct_mv_wr_bottom_bo, | |
409 | 457 | I915_GEM_DOMAIN_INSTRUCTION, 0, |
410 | 458 | 0); |
411 | - else | |
412 | - OUT_BCS_RELOC(ctx, obj_surface->direct_mv_wr_top_bo, | |
459 | + else | |
460 | + OUT_BCS_RELOC(ctx, avc_bsd_surface->direct_mv_wr_top_bo, | |
413 | 461 | I915_GEM_DOMAIN_INSTRUCTION, 0, |
414 | 462 | 0); |
415 | 463 | } else { |
@@ -422,17 +470,21 @@ i965_avc_bsd_buf_base_state(VADriverContextP ctx, struct decode_state *decode_st | ||
422 | 470 | assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); |
423 | 471 | obj_surface = SURFACE(va_pic->picture_id); |
424 | 472 | assert(obj_surface); |
425 | - OUT_BCS_RELOC(ctx, obj_surface->direct_mv_wr_top_bo, | |
473 | + i965_avc_bsd_initialize_private_surface_data(ctx, obj_surface); | |
474 | + avc_bsd_surface = obj_surface->private_data; | |
475 | + avc_bsd_surface->direct_mv_flag = (pic_param->pic_fields.bits.field_pic_flag && | |
476 | + !pic_param->seq_fields.bits.direct_8x8_inference_flag); | |
477 | + | |
478 | + OUT_BCS_RELOC(ctx, avc_bsd_surface->direct_mv_wr_top_bo, | |
426 | 479 | I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, |
427 | 480 | 0); |
428 | 481 | |
429 | - if (pic_param->pic_fields.bits.field_pic_flag && | |
430 | - !pic_param->seq_fields.bits.direct_8x8_inference_flag) | |
431 | - OUT_BCS_RELOC(ctx, obj_surface->direct_mv_wr_bottom_bo, | |
482 | + if (avc_bsd_surface->direct_mv_flag == 1) | |
483 | + OUT_BCS_RELOC(ctx, avc_bsd_surface->direct_mv_wr_bottom_bo, | |
432 | 484 | I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, |
433 | 485 | 0); |
434 | 486 | else |
435 | - OUT_BCS_RELOC(ctx, obj_surface->direct_mv_wr_top_bo, | |
487 | + OUT_BCS_RELOC(ctx, avc_bsd_surface->direct_mv_wr_top_bo, | |
436 | 488 | I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, |
437 | 489 | 0); |
438 | 490 |
@@ -29,6 +29,13 @@ | ||
29 | 29 | #ifndef __I965_AVC_BSD_H__ |
30 | 30 | #define __I965_AVC_BSD_H__ |
31 | 31 | |
32 | +struct i965_avc_bsd_surface | |
33 | +{ | |
34 | + dri_bo *direct_mv_wr_top_bo; | |
35 | + dri_bo *direct_mv_wr_bottom_bo; | |
36 | + int direct_mv_flag; | |
37 | +}; | |
38 | + | |
32 | 39 | struct i965_avc_bsd_context |
33 | 40 | { |
34 | 41 | struct { |
@@ -326,10 +326,12 @@ i965_destroy_surface(struct object_heap *heap, struct object_base *obj) | ||
326 | 326 | |
327 | 327 | dri_bo_unreference(obj_surface->bo); |
328 | 328 | obj_surface->bo = NULL; |
329 | - dri_bo_unreference(obj_surface->direct_mv_wr_top_bo); | |
330 | - obj_surface->direct_mv_wr_top_bo = NULL; | |
331 | - dri_bo_unreference(obj_surface->direct_mv_wr_bottom_bo); | |
332 | - obj_surface->direct_mv_wr_bottom_bo = NULL; | |
329 | + | |
330 | + if (obj_surface->free_private_data != NULL) { | |
331 | + obj_surface->free_private_data(&obj_surface->private_data); | |
332 | + obj_surface->private_data = NULL; | |
333 | + } | |
334 | + | |
333 | 335 | object_heap_free(heap, obj); |
334 | 336 | } |
335 | 337 |
@@ -370,16 +372,8 @@ i965_CreateSurfaces(VADriverContextP ctx, | ||
370 | 372 | obj_surface->size, |
371 | 373 | 64); |
372 | 374 | assert(obj_surface->bo); |
373 | - obj_surface->direct_mv_wr_top_bo = dri_bo_alloc(i965->intel.bufmgr, | |
374 | - "direct mv wr top", | |
375 | - 0x90000, | |
376 | - 64); | |
377 | - assert(obj_surface->direct_mv_wr_top_bo); | |
378 | - obj_surface->direct_mv_wr_bottom_bo = dri_bo_alloc(i965->intel.bufmgr, | |
379 | - "direct mv wr bottom", | |
380 | - 0x90000, | |
381 | - 64); | |
382 | - assert(obj_surface->direct_mv_wr_bottom_bo); | |
375 | + obj_surface->private_data = NULL; | |
376 | + obj_surface->free_private_data = NULL; | |
383 | 377 | } |
384 | 378 | |
385 | 379 | /* Error recovery */ |
@@ -97,9 +97,8 @@ struct object_surface | ||
97 | 97 | int height; |
98 | 98 | int size; |
99 | 99 | dri_bo *bo; |
100 | - /* FIXME: only for H.264 */ | |
101 | - dri_bo *direct_mv_wr_top_bo; | |
102 | - dri_bo *direct_mv_wr_bottom_bo; | |
100 | + void (*free_private_data)(void **data); | |
101 | + void *private_data; | |
103 | 102 | }; |
104 | 103 | |
105 | 104 | struct object_buffer |