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Motorola M6800 (6800) Exorciser / SWTPC emulator plus 6801 instruction set emulation


Commit MetaInfo

修订版b9eccc1dff00d671d111e4edf3834da799bba959 (tree)
时间2020-11-16 00:16:42
作者Joel Matthew Rees <joel.rees@gmai...>
CommiterJoel Matthew Rees

Log Message

unasm now has 6801 stuff and is lightly tested, adding test code to
repository,
fig-forth model for 6801 progressing well?

更改概述

差异

--- /dev/null
+++ b/6801test.68c
@@ -0,0 +1,118 @@
1+ OPT PRT
2+ OPT 6801
3+
4+ ORG $80
5+N RMB 4
6+DPTBL RMB 4
7+
8+ ORG $A0
9+USTARS TSX dodge return address
10+ LDD 2,X multiplier
11+ STD N
12+ LDD 4,X multiplicand
13+ STD N+2
14+ LDA B N multiplier high
15+ MUL
16+ STD 2,X result high cell
17+ LDA B N+1 multiplier low
18+ LDA A N+3 multiplicand low
19+ MUL
20+ STD 4,X result low cell
21+ LDA B N+1 multiplier low
22+ LDA A N+2 multiplicand high
23+ MUL inner 1
24+ ADDD 3,X
25+ STD 3,X
26+ BCC USTAS2
27+ INC 2,X
28+USTAS2 LDA B N multiplier high
29+ LDA A N+3 multiplicand low
30+ MUL inner 2
31+ ADDD 3,X
32+ STD 3,X
33+ BCC USTASD
34+ INC 2,X
35+USTASD RTS
36+
37+
38+STKSZ EQU $80
39+GLOBALSZ EQU $10
40+
41+
42+ ORG $220
43+ FCC "help me, I think I'm falling into the sea."
44+ FCC "wouldn't want to go there by myself, that's such a lonely place to be."
45+
46+ ORG $340
47+ FCB 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
48+
49+
50+
51+ ORG $7800
52+GLOBAL RMB GLOBALSZ
53+
54+ ORG $8000
55+RAMBAR EQU *
56+
57+ ORG $100
58+START LDS #RAMBAR-STKSZ
59+ LDX #$188
60+ PSHX
61+ LDAB #167
62+ ABX
63+ NOP
64+ LDD 3,X
65+ BRN START
66+ LDD #$1234
67+ ADDD #$FEDC
68+ SUBD #$FEDC
69+ LDAA #10
70+ LDAB #25
71+ MUL
72+ PSHB
73+ PSHA
74+ LDD #1001
75+ PSHB
76+ PSHA
77+ JSR USTARS
78+ TSX
79+ LDD 0,X
80+ LSRD
81+ STD 0,X
82+ ROR 2,X
83+ ROR 3,X
84+ LDD 2,X
85+ ASLD
86+ ROL 1,X
87+ ROL 0,X
88+ STD 2,X
89+ SUBD 0,X
90+ LDX 4,X
91+ LDAB #$F8
92+ ABX
93+ LDAB #96
94+ ABX
95+ LDAA $11,X
96+ INX
97+ INX
98+ INX
99+ INX
100+ INX
101+ CMPA 12,X
102+ BNE STOP
103+ NOP
104+ CPX #$345
105+ INS
106+ INS
107+ INS
108+ INS
109+ PULX
110+ CPX #$345
111+ BCC START
112+ NOP
113+ NOP
114+STOP WAIT
115+
116+
117+
118+ ORG START
--- a/fig-forth6801_exorsim.68c
+++ b/fig-forth6801_exorsim.68c
@@ -648,25 +648,22 @@ DIGIT2 CLR B
648648 * "
649649 * "
650650 *
651+PD EQU N ptr to dict word being checked
652+PA0 EQU N+2
653+PA EQU N+4
654+PC EQU N+6
655+*
651656 * ======>> 11 <<
652657 FCB $86
653658 FCC 5,(FIND)
654659 FCB $A9
655660 FDB DIGIT-8
656661 PFIND FDB *+2
657- NOP
658- NOP
659-PD EQU N ptr to dict word being checked
660-PA0 EQU N+2
661-PA EQU N+4
662-PC EQU N+6
663- LDX #PD
664- LDA B #4
665-PFIND0 PUL A loop to get arguments
666- STA A 0,X
667- INX
668- DEC B
669- BNE PFIND0
662+ TSX
663+ LDD 0,X
664+ STD PD
665+ LDD 2,X
666+ STD PA0
670667 *
671668 LDX PD
672669 PFIND1 LDA B 0,X get count dict count
@@ -698,9 +695,12 @@ PFIND3 LDX 0,X get new link
698695 *
699696 * not found :
700697 *
698+ INS
699+ INS
700+ TSX
701701 CLR A
702702 CLR B
703- JMP PUSHBA
703+ JMP STABX
704704 PFIND8 CBA
705705 BEQ PFIND2
706706 PFIND4 LDX PD
@@ -711,22 +711,13 @@ PFIND9 LDA B 0,X scan forward to end of this name
711711 *
712712 * found :
713713 *
714-FOUND LDA A PD compute CFA
715- LDA B PD+1
716- ADD B #4
717- ADC A #0
718- PSH B
719- PSH A
720- LDA A PC
721- PSH A
722- CLR A
723- PSH A
724- LDA B #1
725- JMP PUSHBA
726-*
727- PSH A
714+FOUND TSX
715+ LDD PD compute CFA
716+ ADDD #4
717+ STD 2,X
718+ LDA B PC
728719 CLR A
729- PSH A
720+ STD 0,X
730721 LDA B #1
731722 JMP PUSHBA
732723 *
@@ -745,7 +736,7 @@ ENCLOS FDB *+2
745736 PUL B now, get the low byte, for an 8-bit delimiter
746737 TSX
747738 LDX 0,X
748- CLR N
739+ CLR N Buffer must be less than 256 bytes!
749740 * wait for a non-delimiter or a NUL
750741 ENCL2 LDA A 0,X
751742 BEQ ENCL6
@@ -801,7 +792,7 @@ ENCL8 LDA B N save NC
801792 FCB $D4
802793 FDB ENCLOS-10
803794 EMIT FDB *+2
804- PUL A
795+ INS
805796 PUL A
806797 JSR PEMIT
807798 LDX UP
@@ -847,20 +838,20 @@ CR FDB *+2
847838 FCC 4,CMOVE source, destination, count
848839 FCB $C5
849840 FDB CR-5
850-CMOVE FDB *+2 takes ( 43+47*count cycles )
851- LDX #N
841+CMOVE FDB *+2 takes ( ?? count cycles )
842+ TSX move parameters to scratch area
843+ LDD 0,X
844+ STD N
845+ LDD 2,X
846+ STD N+2
847+ LDD 4,X
848+ STD N+4
852849 LDA B #6
853-CMOV1 PUL A
854- STA A 0,X move parameters to scratch area
855- INX
856- DEC B
857- BNE CMOV1
858-CMOV2 LDA A N
859- LDA B N+1
860- SUB B #1
861- SBC A #0
862- STA A N
863- STA B N+1
850+ ABX
851+ TXS
852+CMOV2 LDD N
853+ SUBD #1
854+ STD N
864855 BCS CMOV3
865856 LDX N+4
866857 LDA A 0,X
@@ -880,33 +871,33 @@ CMOV3 JMP NEXT
880871 FCB $AA
881872 FDB CMOVE-8
882873 USTAR FDB *+2
883- BSR USTARS
884- INS
885- INS
886- JMP PUSHBA
887-*
888-* The following is a subroutine which
889-* multiplies top 2 words on stack,
890-* leaving 32-bit result: high order word in A,B
891-* low order word in 2nd word of stack.
892-*
893-USTARS LDA A #16 bits/word counter
894- PSH A
895- CLR A
896- CLR B
897874 TSX
898-USTAR2 ROR 5,X shift multiplier
899- ROR 6,X
900- DEC 0,X done?
901- BMI USTAR4
902- BCC USTAR3
903- ADD B 4,X
904- ADC A 3,X
905-USTAR3 ROR A
906- ROR B shift result
907- BRA USTAR2
908-USTAR4 INS dump counter
909- RTS
875+ LDAA 1,X least
876+ LDAB 3,X
877+ MUL
878+ STD N+2
879+ LDAA 0,X most
880+ LDAB 2,X
881+ MUL
882+ STD N
883+ LDD 1,X inner
884+ MUL
885+ ADDD N+1
886+ BCC USTAR1
887+ INC N
888+USTAR1 STD N+1
889+ LDAA 0,X inner
890+ LDAB 3,X
891+ MUL
892+ ADDD N+1
893+ BCC USTAR2
894+ INC N
895+USTAR2
896+ STD N+1
897+ LDD N+2
898+ STD 2,X
899+ LDD N
900+ JMP STABX
910901 *
911902 * ######>> screen 24 <<
912903 * ======>> 19 <<
@@ -918,32 +909,32 @@ USLASH FDB *+2
918909 LDA A #17
919910 PSH A
920911 TSX
921- LDA A 3,X
922- LDA B 4,X
923-USL1 CMP A 1,X
924- BHI USL3
925- BCS USL2
926- CMP B 2,X
927- BCC USL3
928-USL2 CLC
929- BRA USL4
930-USL3 SUB B 2,X
931- SBC A 1,X
932- SEC
933-USL4 ROL 6,X
934- ROL 5,X
912+ LDD 3,X dividend high cell
913+USLASL SUBD 1,X try divisor against current frame
914+ BCC USLASR
915+ ADDD 1,X restore
916+ CLC Catch potential boundary cases I don't want to think about.
917+ BRA USLASN
918+USLASR SEC result bit
919+USLASN ROL 6,X shift result in behind
920+ ROL 5,X shift frame right
935921 DEC 0,X
936- BEQ USL5
937- ROL B
922+ BEQ USLASD
923+ ROL B remainder/current frame
938924 ROL A
939- BCC USL1
940- BRA USL3
941-USL5 INS
925+ BCC USLASL Trying to pull it into range this way only works
926+ SUBD 1,X if it only has to work once, AIUI.
927+ BRA USLASR
928+USLASD
929+ STD 1,X temporary
930+ LDD 5,X quotient
931+ STD 3,X top
932+ LDD 1,X
933+ STD 5,X remainder at 2nd
934+ INS SP needs adjusting.
942935 INS
943936 INS
944- INS
945- INS
946- JMP SWAP+4 reverse quotient & remainder
937+ JMP NEXT
947938 *
948939 * ######>> screen 25 <<
949940 * ======>> 20 <<
@@ -957,7 +948,7 @@ AND FDB *+2
957948 TSX
958949 AND B 1,X
959950 AND A 0,X
960- JMP STABX
951+ JMP STABX (Uses D, gets a little speed-up.)
961952 *
962953 * ======>> 21 <<
963954 FCB $82
@@ -993,9 +984,8 @@ XOR FDB *+2
993984 FDB XOR-6
994985 SPAT FDB *+2
995986 TSX
996- STX N scratch area
997- LDX #N
998- JMP GETX
987+ PSHX
988+ JMP NEXT
999989 *
1000990 * ======>> 24 <<
1001991 FCB $83
@@ -1006,7 +996,8 @@ SPSTOR FDB *+2
1006996 LDX UP
1007997 LDX XSPZER-UORIG,X
1008998 TXS watch it ! X and S are not equal.
1009- JMP NEXT
999+ JMP NEXT (Not that it matters here.)
1000+*
10101001 * ======>> 25 <<
10111002 FCB $83
10121003 FCC 2,RP!
@@ -1038,10 +1029,8 @@ SEMIS FDB *+2
10381029 FDB SEMIS-5
10391030 LEAVE FDB *+2
10401031 LDX RP
1041- LDA A 2,X
1042- LDA B 3,X
1043- STA A 4,X
1044- STA B 5,X
1032+ LDD 2,X
1033+ STD 4,X
10451034 JMP NEXT
10461035 *
10471036 * ======>> 28 <<
@@ -1056,8 +1045,7 @@ TOR FDB *+2
10561045 STX RP
10571046 PUL A
10581047 PUL B
1059- STA A 2,X
1060- STA B 3,X
1048+ STD 2,X
10611049 JMP NEXT
10621050 *
10631051 * ======>> 29 <<
@@ -1067,8 +1055,7 @@ TOR FDB *+2
10671055 FDB TOR-5
10681056 FROMR FDB *+2
10691057 LDX RP
1070- LDA A 2,X
1071- LDA B 3,X
1058+ LDD 2,X
10721059 INX
10731060 INX
10741061 STX RP
@@ -1078,11 +1065,7 @@ FROMR FDB *+2
10781065 FCB $81 R
10791066 FCB $D2
10801067 FDB FROMR-5
1081-R FDB *+2
1082- LDX RP
1083- INX
1084- INX
1085- JMP GETX
1068+R FDB I+2
10861069 *
10871070 * ######>> screen 28 <<
10881071 * ======>> 31 <<
@@ -1092,12 +1075,9 @@ R FDB *+2
10921075 FDB R-4
10931076 ZEQU FDB *+2
10941077 TSX
1095- CLR A
1096- CLR B
1097- LDX 0,X
1098- BNE ZEQU2
1099- INC B
1100-ZEQU2 TSX
1078+ LDD 0,X
1079+ BNE ZLESSF Steal code.
1080+ZEQUT LDD #1 Make it stealable.
11011081 JMP STABX
11021082 *
11031083 * ======>> 32 <<
@@ -1107,13 +1087,10 @@ ZEQU2 TSX
11071087 FDB ZEQU-5
11081088 ZLESS FDB *+2
11091089 TSX
1110- LDA A #$80 check the sign bit
1111- AND A 0,X
1112- BEQ ZLESS2
1113- CLR A if neg.
1114- LDA B #1
1115- JMP STABX
1116-ZLESS2 CLR B
1090+ LDD 0,X
1091+ BMI ZEQUT
1092+ZLESSF CLR A
1093+ CLR B
11171094 JMP STABX
11181095 *
11191096 * ######>> screen 29 <<
@@ -1122,11 +1099,10 @@ ZLESS2 CLR B
11221099 FCB $AB
11231100 FDB ZLESS-5
11241101 PLUS FDB *+2
1125- PUL A
1102+ PUL A commutative
11261103 PUL B
11271104 TSX
1128- ADD B 1,X
1129- ADC A 0,X
1105+ ADDD 0,X
11301106 JMP STABX
11311107 *
11321108 * ======>> 34 <<
@@ -1136,14 +1112,13 @@ PLUS FDB *+2
11361112 FDB PLUS-4
11371113 DPLUS FDB *+2
11381114 TSX
1139- CLC
1140- LDA B #4
1141-DPLUS2 LDA A 3,X
1142- ADC A 7,X
1143- STA A 7,X
1144- DEX
1145- DEC B
1146- BNE DPLUS2
1115+ LDD 6,X
1116+ ADDD 2,X
1117+ STD 6,X
1118+ LDD 4,X
1119+ ADC B 1,X
1120+ ADC A 0,X
1121+ STD 4,X
11471122 INS
11481123 INS
11491124 INS
@@ -1157,12 +1132,10 @@ DPLUS2 LDA A 3,X
11571132 FDB DPLUS-5
11581133 MINUS FDB *+2
11591134 TSX
1160- NEG 1,X
1161- BCC MINUS2
1162- NEG 0,X
1163- BRA MINUS3
1164-MINUS2 COM 0,X
1165-MINUS3 JMP NEXT
1135+ CLR B
1136+ CLR A
1137+ SUB D 0,X
1138+ JMP STABX
11661139 *
11671140 * ======>> 36 <<
11681141 FCB $86
@@ -1171,17 +1144,14 @@ MINUS3 JMP NEXT
11711144 FDB MINUS-8
11721145 DMINUS FDB *+2
11731146 TSX
1174- COM 0,X
1175- COM 1,X
1176- COM 2,X
1177- NEG 3,X
1178- BNE DMINX
1179- INC 2,X
1180- BNE DMINX
1181- INC 1,X
1182- BNE DMINX
1183- INC 0,X
1184-DMINX JMP NEXT
1147+ CLR B
1148+ CLR A
1149+ SUB D 2,X
1150+ STD 2,X
1151+ LDD #0
1152+ SBC B 1,X
1153+ SBC A 0,X
1154+ JMP STABX
11851155 *
11861156 * ######>> screen 30 <<
11871157 * ======>> 37 <<
@@ -1191,8 +1161,7 @@ DMINX JMP NEXT
11911161 FDB DMINUS-9
11921162 OVER FDB *+2
11931163 TSX
1194- LDA A 2,X
1195- LDA B 3,X
1164+ LDD 2,X
11961165 JMP PUSHBA
11971166 *
11981167 * ======>> 38 <<
@@ -1201,8 +1170,7 @@ OVER FDB *+2
12011170 FCB $D0
12021171 FDB OVER-7
12031172 DROP FDB *+2
1204- INS
1205- INS
1173+ PULX
12061174 JMP NEXT
12071175 *
12081176 * ======>> 39 <<
@@ -1211,17 +1179,30 @@ DROP FDB *+2
12111179 FCB $D0
12121180 FDB DROP-7
12131181 SWAP FDB *+2
1214- PUL A
1215- PUL B
1216- TSX
1217- LDX 0,X
1218- INS
1219- INS
1220- PSH B
1221- PSH A
1222- STX N
1223- LDX #N
1224- JMP GETX
1182+ PULX
1183+ PULA
1184+ PULB
1185+ PSHX
1186+ PSHB
1187+ PSHA
1188+ JMP NEXT
1189+* TSX
1190+* LDD 2,X
1191+* STD N
1192+* LDD 0,X
1193+* STD 2,X
1194+* LDD N
1195+* JMP STABX
1196+*
1197+* LDA A 0,X
1198+* LDA B 2,X
1199+* STA B 0,X
1200+* STA A 2,X
1201+* LDA A 1,X
1202+* LDA B 3,X
1203+* STA B 1,X
1204+* STA A 3,X
1205+* JMP NEXT
12251206 *
12261207 * ======>> 40 <<
12271208 FCB $83
@@ -1229,11 +1210,13 @@ SWAP FDB *+2
12291210 FCB $D0
12301211 FDB SWAP-7
12311212 DUP FDB *+2
1232- PUL A
1233- PUL B
1234- PSH B
1235- PSH A
1236- JMP PUSHBA
1213+ PULX
1214+ PSHX
1215+ PSHX
1216+ JMP NEXT
1217+* TSX
1218+* LDD 0,X
1219+* JMP PUSHBA
12371220 *
12381221 * ######>> screen 31 <<
12391222 * ======>> 41 <<
@@ -1242,16 +1225,11 @@ DUP FDB *+2
12421225 FCB $A1
12431226 FDB DUP-6
12441227 PSTORE FDB *+2
1245- TSX
1246- LDX 0,X
1247- INS
1248- INS
1228+ PULX
12491229 PUL A get stack data
12501230 PUL B
1251- ADD B 1,X add & store low byte
1252- STA B 1,X
1253- ADC A 0,X add & store hi byte
1254- STA A 0,X
1231+ ADDD 0,X
1232+ STD 0,X
12551233 JMP NEXT
12561234 *
12571235 * ======>> 42 <<
@@ -1268,10 +1246,7 @@ TOGGLE FDB DOCOL,OVER,CAT,XOR,SWAP,CSTORE
12681246 FCB $C0
12691247 FDB TOGGLE-9
12701248 AT FDB *+2
1271- TSX
1272- LDX 0,X get address
1273- INS
1274- INS
1249+ PULX
12751250 JMP GETX
12761251 *
12771252 * ======>> 44 <<
@@ -1280,12 +1255,9 @@ AT FDB *+2
12801255 FCB $C0
12811256 FDB AT-4
12821257 CAT FDB *+2
1283- TSX
1284- LDX 0,X
1258+ PULX
12851259 CLR A
12861260 LDA B 0,X
1287- INS
1288- INS
12891261 JMP PUSHBA
12901262 *
12911263 * ======>> 45 <<
@@ -1293,10 +1265,7 @@ CAT FDB *+2
12931265 FCB $A1
12941266 FDB CAT-5
12951267 STORE FDB *+2
1296- TSX
1297- LDX 0,X get address
1298- INS
1299- INS
1268+ PULX get address
13001269 JMP PULABX
13011270 *
13021271 * ======>> 46 <<
@@ -1305,6 +1274,7 @@ STORE FDB *+2
13051274 FCB $A1
13061275 FDB STORE-4
13071276 CSTORE FDB *+2
1277+
13081278 TSX
13091279 LDX 0,X get address
13101280 INS
@@ -1313,6 +1283,7 @@ CSTORE FDB *+2
13131283 PUL B
13141284 STA B 0,X
13151285 JMP NEXT
1286+*
13161287 PAGE
13171288 *
13181289 * ######>> screen 33 <<
@@ -2619,11 +2590,10 @@ STOD FDB DOCOL,DUP,ZLESS,MINUS
26192590 FCB $81 ; *
26202591 FCB $AA
26212592 FDB STOD-7
2622-STAR FDB *+2
2623- JSR USTARS
2624- INS
2625- INS
2626- JMP NEXT
2593+STAR FDB DOCOL
2594+ FDB USTAR
2595+ FDB DROP
2596+ FDB SEMIS
26272597 *
26282598 * ======>> 160 <<
26292599 FCB $84
--- /dev/null
+++ b/tests.fs
@@ -0,0 +1,47 @@
1+: STAR 42 EMIT ;
2+: STARS 0 DO STAR LOOP ;
3+
4+40 STARS
5+
6+: TEST 0 DO I . I EMIT CR LOOP ;
7+: TEST2 0 DO I . I EMIT CR 4 +LOOP ;
8+: TESTDOWN 256 DO I . I EMIT CR -4 +LOOP ;
9+
10+HEX
11+8000. 8000 U/ . . ( 1 0 )
12+8000. 8001 U/ . . ( 0 -8000 )
13+
14+SP@ .
15+SP! SP@ .
16+
17+4545.4545 3423.3423 D+ D. ( 79687968 )
18+4545.5656 3423.DCDC D+ D. ( 79693332 )
19+7FFF.FFFF 1. D+ D. ( -80000000 )
20+
21+SP@ .
22+
23+8001 MINUS .
24+8000 MINUS .
25+
26+7FFF.FFFF DMINUS D.
27+8000.0001 DMINUS D.
28+8000.0000 DMINUS D.
29+
30+SP@ .
31+
32+45AA 10 OVER . . .
33+
34+SP@ .
35+
36+45AA 10 SWAP . .
37+
38+SP@ .
39+
40+1 VARIABLE ALPHA
41+
42+ALPHA 1+ F0 TOGGLE ALPHA @ .
43+
44+
45+
46+
47+
--- a/unasm6800.c
+++ b/unasm6800.c
@@ -20,6 +20,7 @@
2020 #include <stdlib.h>
2121 #include <string.h>
2222
23+#include "exorsim.h" /* JMR20201103 */
2324 #include "unasm6800.h"
2425 #include "utils.h" /* JMR20201103 */
2526
@@ -266,7 +267,11 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
266267 sprintf(buf + strlen(buf), "%2.2X ", opcode = mem[pc++]);
267268
268269 if (opcode & 0x80) {
270+#ifdef SIM6801
271+ if ( ((opcode & 0x0F) < 0x0C) && ((opcode & 0x0F) != 0x03) ) {
272+#else
269273 if ((opcode & 0x0F) < 0x0C) {
274+#endif /* def SIM6801 */
270275 /* Get operand A */
271276 if (opcode & 0x40) {
272277 sprintf(operand, "B");
@@ -316,10 +321,19 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
316321 } case 0x02: /* SBC N,Z,V,C (no H?) */ {
317322 insn = "SBC";
318323 break;
319- } case 0x03: /* ??? */ {
324+ }
325+#ifdef SIM6801
326+ case 0x03: /* ACCMD should never get here at run time. */ {
327+ insn = "";
328+ break;
329+ }
330+#else
331+ case 0x03: /* ??? */ {
320332 insn = "???";
321333 break;
322- } case 0x04: /* AND N,Z,V=0 */ {
334+ }
335+#endif /* ndef SIM6801 */
336+ case 0x04: /* AND N,Z,V=0 */ {
323337 insn = "AND";
324338 break;
325339 } case 0x05: /* BIT N,Z,V=0*/ {
@@ -375,7 +389,13 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
375389 }
376390 }
377391 switch (opcode) {
378- case 0x8C: case 0x9C: case 0xAC: case 0xBC: /* CPX N,Z,V */ {
392+#ifdef SIM6801
393+ case 0x83: case 0x93: case 0xA3: case 0xB3: /* SUBD N,Z,V,C (6801) */ {
394+ insn = "SUBD";
395+ break;
396+ }
397+#endif /* def SIM6801 */
398+ case 0x8C: case 0x9C: case 0xAC: case 0xBC: /* CPX N,Z,V */ {
379399 insn = "CPX";
380400 break;
381401 } case 0x8D: /* BSR REL */ {
@@ -390,12 +410,29 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
390410 } case 0x8F: case 0x9F: case 0xAF: case 0xBF: /* STS N,Z,V */ {
391411 insn = "STS";
392412 break;
393- } case 0xAD: case 0xBD: /* JSR */ {
413+ }
414+#ifdef SIM6801
415+ case 0x9D: /* (6801) */
416+#endif /* def SIM6801 */
417+ case 0xAD: case 0xBD: /* JSR */ {
394418 branch_target = (mem[pc - 2] << 8) + mem[pc - 1];
395419 is_jsr = 1;
396420 insn = "JSR";
397421 break;
398- } case 0xCE: case 0xDE: case 0xEE: case 0xFE: /* LDX N,Z,V */ {
422+ }
423+#ifdef SIM6801
424+ case 0xC3: case 0xD3: case 0xE3: case 0xF3: /* ADDD N,Z,V,C (6801) */ {
425+ insn = "ADDD";
426+ break;
427+ } case 0xCC: case 0xDC: case 0xEC: case 0xFC: /* LDD N,Z,V=0 (6801) */ {
428+ insn = "LDD";
429+ break;
430+ } case 0xCD: case 0xDD: case 0xED: case 0xFD: /* STD N,Z,V=0 (6801) */ {
431+ insn = "STD";
432+ break;
433+ }
434+#endif /* def SIM6801 */
435+ case 0xCE: case 0xDE: case 0xEE: case 0xFE: /* LDX N,Z,V */ {
399436 insn = "LDX";
400437 break;
401438 } case 0xCF: case 0xDF: case 0xEF: case 0xFF: /* STX N,Z,V */ {
@@ -483,7 +520,17 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
483520 case 0x01: /* NOP */ { /* Do nothing */
484521 insn = "NOP";
485522 break;
486- } case 0x06: /* TAP (all flags) */ {
523+ }
524+#ifdef SIM6801
525+ case 0x04: /* LSRD N=0,Z,V,C (6801) */ {
526+ insn = "LSRD";
527+ break;
528+ } case 0x05: /* LSLD N,Z,V,C (6801) */ {
529+ insn = "LSLD";
530+ break;
531+ }
532+#endif /* def SIM6801 */
533+ case 0x06: /* TAP (all flags) */ {
487534 insn = "TAP";
488535 break;
489536 } case 0x07: /* TPA */ {
@@ -538,7 +585,18 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
538585 sprintf(operand + strlen(operand), " $%4.4X", branch_target);
539586 insn = "BRA";
540587 break;
541- } case 0x22: /* BHI */ {
588+ }
589+#ifdef SIM6801
590+ case 0x21: /* BRN (6801) */ {
591+ offset = mem[pc++];
592+ sprintf(buf + strlen(buf), "%2.2X ", mem[pc - 1]);
593+ branch_target = pc + offset;
594+ sprintf(operand + strlen(operand), " $%4.4X", branch_target);
595+ insn = "BRN";
596+ break;
597+ }
598+#endif /* def SIM6801 */
599+ case 0x22: /* BHI */ {
542600 offset = mem[pc++];
543601 sprintf(buf + strlen(buf), "%2.2X ", mem[pc - 1]);
544602 branch_target = pc + offset;
@@ -660,13 +718,37 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
660718 } case 0x37: /* PSHB */ {
661719 insn = "PSHB";
662720 break;
663- } case 0x39: /* RTS */ {
721+ }
722+#ifdef SIM6801
723+ case 0x38: /* PULX (6801) */ {
724+ insn = "PULX";
725+ break;
726+ }
727+#endif /* def SIM6801 */
728+ case 0x39: /* RTS */ {
664729 insn = "RTS";
665730 break;
666- } case 0x3B: /* RTI */ {
731+ }
732+#ifdef SIM6801
733+ case 0x3A: /* ABX (6801) */ {
734+ insn = "ABX";
735+ break;
736+ }
737+#endif /* def SIM6801 */
738+ case 0x3B: /* RTI */ {
667739 insn = "RTI";
668740 break;
669- } case 0x3E: /* WAI */ {
741+ }
742+#ifdef SIM6801
743+ case 0x3C: /* PSHX (6801) */ {
744+ insn = "PSHX";
745+ break;
746+ } case 0x3D: /* MUL C=accb bit 7 (6801) */ {
747+ insn = "MUL";
748+ break;
749+ }
750+#endif /* def SIM6801 */
751+ case 0x3E: /* WAI */ {
670752 insn = "WAI";
671753 break;
672754 } case 0x3F: /* SWI */ {