提交: cc0e06aeb3c9272f68b0f27a7df1e37ab9de3c85 - exorsim6801 (git)

Motorola M6800 (6800) Exorciser / SWTPC emulator plus 6801 instruction set emulation

Commit MetaInfo

• 修订版: cc0e06aeb3c9272f68b0f27a7df1e37ab9de3c85 (tree)
• 时间: 2020-11-22 17:23:23
• 作者: Joel Matthew Rees <joel.rees@gmai...>
• Commiter: Joel Matthew Rees

Log Message

unasm changed to runtime option for 6801, lightly tested, forgotten
exorsim.c added

更改概述

• modified: asm6800.c
• add: exorsim.c
• modified: sim6800.c
• modified: unasm.c
• modified: unasm6800.c

差异

--- a/asm6800.c
+++ b/asm6800.c
@@ -192,9 +192,9 @@ enum {
         ACC,	/* Accumulator needed */
         ACC1,	/* Accumulator optional */
         ACCB,	/* we need an A or a B: add 0x01 for B */
-#ifdef SIM6801
+/* #ifdef SIM6801 */
         ACCD,	/* LDD,STD,ADDD,SUBD */
-#endif /* def SIM6801 */
+/* #endif / * def SIM6801 */
         NONE	/* No operand */
 };
 

--- /dev/null
+++ b/exorsim.c
@@ -0,0 +1,28 @@
+/*	Configurations file
+ *      for modifications to Joseph H. Allen's Exorsim
+ *	This file copyright 2020 Joel Matthew Rees
+ *
+ * This is free software; you can redistribute it and/or modify it under the 
+ * terms of the GNU General Public License as published by the Free Software 
+ * Foundation; either version 1, or (at your option) any later version.  
+ *
+ * It is distributed in the hope that it will be useful, but WITHOUT ANY 
+ * WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS 
+ * FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more 
+ * details.  
+ * 
+ * You should have received a copy of the GNU General Public License along with 
+ * this software; see the file COPYING.  If not, write to the Free Software Foundation, 
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#define EXORSIM_C
+
+#include "exorsim.h"
+
+unsigned cputype = SIM6801;
+
+
+
+

--- a/sim6800.c
+++ b/sim6800.c
@@ -258,11 +258,11 @@ void show_trace(int insn_no, struct trace_entry *t)
 				} case 0x02: /* SBC N,Z,V,C (no H?) */ {
 					insn = "SBC";
 					break;
-				} case 0x03: /* ACCMD should never get here at run time? */ {
+				} case 0x03: /* ACCMD should never get here at run time when CPU is 6801? */ {
 					if  (cputype == 0x6800)
 						goto invalid; /* ??? */
 					else
-						insn = "SUBD***";
+						insn = "???SUBD";
 					break;
 				} case 0x04: /* AND N,Z,V=0 */ {
 					insn = "AND";
@@ -349,31 +349,31 @@ void show_trace(int insn_no, struct trace_entry *t)
 					insn = "STS";
 					break;
 				} case 0x9D: case 0xAD: case 0xBD: /* JSR */ {
-					if (cputype == 0x6800 && t->insn[0] == 0x9D)
-{ fputs( "JSR error\n", stderr );						goto invalid16;
-}				        else if (t->cc & 0x80)
+					if (cputype < 0x6801 && t->insn[0] == 0x9D)
+						goto invalid16;
+				        else if (t->cc & 0x80)
         					sprintf(buf3, "EA=%4.4X%s", t->ea, buf_ea);
 					insn = "JSR";
 					subr = 1;
 					break;
 				} case 0xC3: case 0xD3: case 0xE3: case 0xF3: /* ADDD N,Z,V,C (6801) */ {
-					if (cputype == 0x6800)
-{ fputs( "ADDD error\n", stderr );						goto invalid16;
-}				        else if (t->cc & 0x80)
+					if (cputype < 0x6801)
+						goto invalid16;
+				        else if (t->cc & 0x80)
         					sprintf(buf3, "EA=%4.4X%s D=%4.4X", t->ea, buf_ea, t->data);
 					insn = "ADDD";
 					break;
 				} case 0xCC: case 0xDC: case 0xEC: case 0xFC: /* LDD N,Z,V=0 (6801) */ {
-				        if (cputype == 0x6800)
-{ fputs( "LDD error\n", stderr );						goto invalid16;
-}				        else if (t->cc & 0x80)
+				        if (cputype < 0x6801)
+						goto invalid16;
+				        else if (t->cc & 0x80)
         					sprintf(buf3, "EA=%4.4X%s D=%4.4X", t->ea, buf_ea, t->data);
 					insn = "LDD";
 					break;
 				} case 0xCD: case 0xDD: case 0xED: case 0xFD: /* STD N,Z,V=0 (6801) */ {
-				        if (cputype == 0x6800)
-{ fputs( "STD error\n", stderr );						goto invalid16;
-}				        else if (t->cc & 0x80)
+				        if (cputype < 0x6801)
+						goto invalid16;
+				        else if (t->cc & 0x80)
         					sprintf(buf3, "EA=%4.4X%s D=%4.4X", t->ea, buf_ea, t->data);
 					insn = "STD";
 					break;
@@ -389,7 +389,6 @@ void show_trace(int insn_no, struct trace_entry *t)
 					break;
 				} default: /* ??? */ {
 invalid16:
-fprintf( stderr, "invalid16 from mnemonic: %x\n", t->insn[0] );
 					goto invalid;
 					break;
 				}
@@ -475,16 +474,14 @@ fprintf( stderr, "invalid16 from mnemonic: %x\n", t->insn[0] );
 				insn = "NOP";
 				break;
 			} case 0x04: /* LSRD N=0,Z,V,C (6801) */ {
-				if (cputype == 0x6800)
+				if (cputype < 0x6801)
 					goto invalidinh;
-				else
-					insn = "LSRD";
+				insn = "LSRD";
 				break;
 			} case 0x05: /* LSLD N,Z,V,C (6801) */ {
-				if (cputype == 0x6800)
+				if (cputype < 0x6801)
 					goto invalidinh;
-				else
-					insn = "LSLD";
+				insn = "LSLD";
 				break;
 			} case 0x06: /* TAP (all flags) */ {
 				insn = "TAP";
@@ -542,15 +539,13 @@ fprintf( stderr, "invalid16 from mnemonic: %x\n", t->insn[0] );
 				insn = "BRA";
 				break;
 			} case 0x21: /* BRN (6801) */ {
-				if (cputype == 0x6800)
+				if (cputype < 0x6801)
 					goto invalidinh;
-				else {
-					sprintf(buf + strlen(buf), "%2.2X ", t->insn[1]);
-					sprintf(operand, " %4.4X", t->pc + 2 + (char)t->insn[1]);
-                                	if (t->cc & 0x80)
-                                        	sprintf(buf3, "EA=%4.4X%s", t->ea, buf_ea);
-					insn = "BRN";
-				}
+				sprintf(buf + strlen(buf), "%2.2X ", t->insn[1]);
+				sprintf(operand, " %4.4X", t->pc + 2 + (char)t->insn[1]);
+                                if (t->cc & 0x80)
+                                       	sprintf(buf3, "EA=%4.4X%s", t->ea, buf_ea);
+				insn = "BRN";
 				break;
 			} case 0x22: /* BHI */ {
 				sprintf(buf + strlen(buf), "%2.2X ", t->insn[1]);
@@ -675,7 +670,7 @@ fprintf( stderr, "invalid16 from mnemonic: %x\n", t->insn[0] );
 				insn = "PSHB";
 				break;
 			} case 0x38: /* PULX (6801) */ {
-				if (cputype == 0x6800)
+				if (cputype < 0x6801)
 					goto invalidinh;
 				else
 					insn = "PULX";
@@ -685,26 +680,23 @@ fprintf( stderr, "invalid16 from mnemonic: %x\n", t->insn[0] );
 				subr = 1;
 				break;
 			} case 0x3A: /* ABX (6801) */ {
-				if (cputype == 0x6800)
+				if (cputype < 0x6801)
 					goto invalidinh;
-				else
-					insn = "ABX";
+				insn = "ABX";
 				break;
 			} case 0x3B: /* RTI */ {
 				insn = "RTI";
 				subr = 1;
 				break;
 			} case 0x3C: /* PSHX (6801) */ {
-				if (cputype == 0x6800)
+				if (cputype < 0x6801)
 					goto invalidinh;
-				else
-					insn = "PSHX";
+				insn = "PSHX";
 				break;
 			} case 0x3D: /* MUL C=accb bit 7 (6801) */ {
-				if (cputype == 0x6800)
+				if (cputype < 0x6801)
 					goto invalidinh;
-				else
-					insn = "MUL";
+				insn = "MUL";
 				break;
 			} case 0x3E: /* WAI */ {
 				insn = "WAI";
@@ -997,7 +989,7 @@ void sim(void)
 				}
 				switch (opcode) {
 					  case 0x83: case 0x93: case 0xA3: case 0xB3: /* SUBD N,Z,V,C (6801) */ {
-						if (cputype == 0x6800) {
+						if (cputype < 0x6801) {
 							fprintf( stderr, "Internal error on SUBD (6800)\n" );
 							goto invalid16;
 						}
@@ -1018,7 +1010,7 @@ void sim(void)
                                                 t->ea = ea; t->data = w;
 						fw = ix - w;
 						z_flag = Z_16(fw);
-						if (cputype == 0x6800) {
+						if (cputype < 0x6801) {
 							f = ( ix >> 8 ) - ( w >> 8 );
 							n_flag = N(f);
 							v_flag = V(ix >> 8, w >> 8, f);
@@ -1048,18 +1040,18 @@ void sim(void)
 					}
 					  case 0x9D:	/* (6801) */
 					  case 0xAD: case 0xBD: /* JSR */ {
-						if (cputype == 0x6800 && opcode == 0x9D)
-{ fputs( "JSR op error\n", stderr );							goto invalid16;
-}						else {
+						if (cputype < 0x6801 && opcode == 0x9D)
+							goto invalid16;
+						else {
 							push2(pc);
 							jump(ea);
         	                                        t->ea = ea;
 						}
 						break;
 					} case 0xC3: case 0xD3: case 0xE3: case 0xF3: /* ADDD N,Z,V,C (6801) */ {
-						if (cputype == 0x6800)
-{ fputs( "ADDD op error\n", stderr );							goto invalid16;
-}						else {
+						if (cputype < 0x6801)
+							goto invalid16;
+						else {
 							setACCD( accd );
 							w = mread2(ea);
 							t->ea = ea; t->data = w;
@@ -1072,9 +1064,9 @@ void sim(void)
 						}
 						break;
 					} case 0xCC: case 0xDC: case 0xEC: case 0xFC: /* LDD N,Z,V=0 (6801) */ {
-						if (cputype == 0x6800)
-{ fputs( "LDD op error\n", stderr );							goto invalid16;
-}						else {
+						if (cputype < 0x6801)
+							goto invalid16;
+						else {
 							accd = mread2(ea);
 		                                        t->ea = ea; t->data = accd;
 							z_flag = Z_16( accd );
@@ -1084,9 +1076,9 @@ void sim(void)
 						}
 						break;
 					} case 0xDD: case 0xED: case 0xFD: /* STD N,Z,V=0 (6801) */ {
-						if (cputype == 0x6800)
-{ fputs( "STD op error\n", stderr );							goto invalid16;
-}						else {
+						if (cputype < 0x6801)
+							goto invalid16;
+						else {
 							setACCD( accd );
 							n_flag = N_16( accd );
 							z_flag = Z_16( accd );
@@ -1111,8 +1103,6 @@ void sim(void)
 						break;
 					} default: /* ??? */ {
 invalid16:
-fprintf( stderr, "invalid16 from opcode: %x => %x\n", t->insn[0], opcode );
-
 					        goto invalid;
 						break;
 					}
@@ -1255,7 +1245,7 @@ fprintf( stderr, "invalid16 from opcode: %x => %x\n", t->insn[0], opcode );
 				case 0x01: /* NOP */ { /* Do nothing */
 					break;
 				} case 0x04: /* LSRD (6801) */ {
-					if (cputype == 0x6800)
+					if (cputype < 0x6801)
 						goto invalidinh;
 					else {
 						setACCD( accd );
@@ -1269,7 +1259,7 @@ fprintf( stderr, "invalid16 from opcode: %x => %x\n", t->insn[0], opcode );
 					}
 					break;
 				} case 0x05: /* LSLD (6801) */ {
-					if (cputype == 0x6800)
+					if (cputype < 0x6801)
 						goto invalidinh;
 					else {
 						setACCD( accd );
@@ -1369,7 +1359,7 @@ fprintf( stderr, "invalid16 from opcode: %x => %x\n", t->insn[0], opcode );
 					jump(t->ea = (pc + offset));
 					break;
 				} case 0x21: /* BRN (6801) */ {
-					if (cputype == 0x6800)
+					if (cputype < 0x6801)
 						goto invalidinh;
 					else {
 						offset = fetch();
@@ -1485,7 +1475,7 @@ fprintf( stderr, "invalid16 from opcode: %x => %x\n", t->insn[0], opcode );
 					push(accb);
 					break;
 				} case 0x38: /* PULX (6801) */ {
-					if (cputype == 0x6800)
+					if (cputype < 0x6801)
 						goto invalidinh;
 					else {
 						ix = pull2();
@@ -1499,7 +1489,7 @@ fprintf( stderr, "invalid16 from opcode: %x => %x\n", t->insn[0], opcode );
         					jump(pull2());
 					break;
 				} case 0x3A: /* ABX (6801) */ {
-					if (cputype == 0x6800)
+					if (cputype < 0x6801)
 						goto invalidinh;
 					else {
 						ix = ix + accb;
@@ -1513,14 +1503,14 @@ fprintf( stderr, "invalid16 from opcode: %x => %x\n", t->insn[0], opcode );
 					jump(pull2());
 					break;
 				} case 0x3C: /* PSHX (6801) */ {
-					if (cputype == 0x6800)
+					if (cputype < 0x6801)
 						goto invalidinh;
 					else {
 						push2(ix);
 					}
 					break;
 				} case 0x3D: /* MUL C=accb bit 7 (6801) */ {
-					if (cputype == 0x6800)
+					if (cputype < 0x6801)
 						goto invalidinh;
 					else {
 						unsigned product = acca * accb;

--- a/unasm.c
+++ b/unasm.c
@@ -22,6 +22,7 @@
 #include <stdlib.h>
 #include <string.h>
 
+#include "exorsim.h"	/* JMR20201121 */
 #include "utils.h"
 #include "unasm6800.h"
 
@@ -50,6 +51,8 @@ int main(int argc, char *argv[])
                                 ++x;
                                 char *p = argv[x];
                                 parse_hex(&p, &addr);
+                        } else if (!strcmp(argv[x], "--6801")) {
+                                cputype = 0x6801;
                         } else {
                                 err:
                                 printf("M6800 unassembler\n");
@@ -58,6 +61,7 @@ int main(int argc, char *argv[])
                                 printf("\n");
                                 printf("  --facts file	Annotate with known facts\n");
                                 printf("  --addr hhhh	Starting address of dumpfile\n");
+                                printf("  --6801        Handle additional 6801 instructions\n");
                                 exit(-1);
                         }
                 } else {

--- a/unasm6800.c
+++ b/unasm6800.c
@@ -267,11 +267,9 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
 	sprintf(buf + strlen(buf), "%2.2X ", opcode = mem[pc++]);
 
 	if (opcode & 0x80) {
-#ifdef SIM6801
-		if ( ((opcode & 0x0F) < 0x0C) && ((opcode & 0x0F) != 0x03) ) {
-#else
-		if ((opcode & 0x0F) < 0x0C) {
-#endif /* def SIM6801 */
+		unsigned opc_det = opcode & 0x0f;
+		if ( (cputype < 0x6801 && opc_det < 0x0C)  
+		     || (opc_det < 0x0c && opc_det != 0x03) ) {
 			/* Get operand A */
 			if (opcode & 0x40) {
 				sprintf(operand, "B");
@@ -321,19 +319,12 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
 				} case 0x02: /* SBC N,Z,V,C (no H?) */ {
 					insn = "SBC";
 					break;
-				}
-#ifdef SIM6801
-				  case 0x03: /* ACCMD should never get here at run time. */ {
-					insn = "";
-					break;
-				}
-#else
-				  case 0x03: /* ??? */ {
+				} case 0x03:  /* ACCMD should never get here at run time when CPU is 6801? */ {
+					if  (cputype == 0x6801)
+						fprintf( stderr, "Internal error on SUBD (6801)\n" );
 					insn = "???";
 					break;
-				}
-#endif /* ndef SIM6801 */
-				  case 0x04: /* AND N,Z,V=0 */ {
+				} case 0x04: /* AND N,Z,V=0 */ {
 					insn = "AND";
 					break;
 				} case 0x05: /* BIT N,Z,V=0*/ {
@@ -389,13 +380,12 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
 				}
 			}
 			switch (opcode) {
-#ifdef SIM6801
 				  case 0x83: case 0x93: case 0xA3: case 0xB3: /* SUBD N,Z,V,C (6801) */ {
-					insn = "SUBD";
+					/* Should never come here when cputype == 0x6800. */
+					/* But if it does, we want to do something defined. */
+					insn = (cputype < 0x6801) ? "???SUBD" : "SUBD";
 					break;
-				}
-#endif /* def SIM6801 */
-				  case 0x8C: case 0x9C: case 0xAC: case 0xBC: /* CPX N,Z,V */ {
+				} case 0x8C: case 0x9C: case 0xAC: case 0xBC: /* CPX N,Z,V */ {
 					insn = "CPX";
 					break;
 				} case 0x8D: /* BSR REL */ {
@@ -410,35 +400,36 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
 				} case 0x8F: case 0x9F: case 0xAF: case 0xBF: /* STS N,Z,V */ {
 					insn = "STS";
 					break;
-				}
-#ifdef SIM6801
-				  case 0x9D:	/* (6801) */
-#endif /* def SIM6801 */
-				  case 0xAD: case 0xBD: /* JSR */ {
+				} case 0x9D: case 0xAD: case 0xBD: /* JSR */ {
+					if (cputype < 0x6801 && opcode == 0x9D)
+						goto invalid16;
 					branch_target = (mem[pc - 2] << 8) + mem[pc - 1];
 					is_jsr = 1;
 					insn = "JSR";
 					break;
-				}
-#ifdef SIM6801
-				  case 0xC3: case 0xD3: case 0xE3: case 0xF3: /* ADDD N,Z,V,C (6801) */ {
+				} case 0xC3: case 0xD3: case 0xE3: case 0xF3: /* ADDD N,Z,V,C (6801) */ {
+					if (cputype < 0x6801)
+						goto invalid16;
 					insn = "ADDD";
 					break;
 				} case 0xCC: case 0xDC: case 0xEC: case 0xFC: /* LDD N,Z,V=0 (6801) */ {
+					if (cputype < 0x6801)
+						goto invalid16;
 					insn = "LDD";
 					break;
 				} case 0xCD: case 0xDD: case 0xED: case 0xFD: /* STD N,Z,V=0 (6801) */ {
+					if (cputype < 0x6801)
+						goto invalid16;
 					insn = "STD";
 					break;
-				}
-#endif /* def SIM6801 */
-				  case 0xCE: case 0xDE: case 0xEE: case 0xFE: /* LDX N,Z,V */ {
+				} case 0xCE: case 0xDE: case 0xEE: case 0xFE: /* LDX N,Z,V */ {
 					insn = "LDX";
 					break;
 				} case 0xCF: case 0xDF: case 0xEF: case 0xFF: /* STX N,Z,V */ {
 					insn = "STX";
 					break;
 				} default: /* ??? */ {
+invalid16:
 					insn = "???";
 					break;
 				}
@@ -520,17 +511,17 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
 			case 0x01: /* NOP */ { /* Do nothing */
 				insn = "NOP";
 				break;
-			}
-#ifdef SIM6801
- 			  case 0x04: /* LSRD N=0,Z,V,C (6801) */ {
+			} case 0x04: /* LSRD N=0,Z,V,C (6801) */ {
+				if (cputype < 0x6801)
+					goto invalidinh;
 				insn = "LSRD";
 				break;
 			} case 0x05: /* LSLD N,Z,V,C (6801) */ {
+				if (cputype < 0x6801)
+					goto invalidinh;
 				insn = "LSLD";
 				break;
-			}
-#endif /* def SIM6801 */
-			  case 0x06: /* TAP (all flags) */ {
+			} case 0x06: /* TAP (all flags) */ {
 				insn = "TAP";
 				break;
 			} case 0x07: /* TPA */ {
@@ -585,18 +576,16 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
 				sprintf(operand + strlen(operand), " $%4.4X", branch_target);
 				insn = "BRA";
 				break;
-			}
-#ifdef SIM6801
-			  case 0x21: /* BRN (6801) */ {
+			} case 0x21: /* BRN (6801) */ {
+				if (cputype < 0x6801)
+					goto invalidinh;
 				offset = mem[pc++];
 				sprintf(buf + strlen(buf), "%2.2X ", mem[pc - 1]);
 				branch_target = pc + offset;
 				sprintf(operand + strlen(operand), " $%4.4X", branch_target);
 				insn = "BRN";
 				break;
-			}
-#endif /* def SIM6801 */
-			  case 0x22: /* BHI */ {
+			} case 0x22: /* BHI */ {
 				offset = mem[pc++];
 				sprintf(buf + strlen(buf), "%2.2X ", mem[pc - 1]);
 				branch_target = pc + offset;
@@ -718,37 +707,33 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
 			} case 0x37: /* PSHB */ {
 				insn = "PSHB";
 				break;
-			}
-#ifdef SIM6801
-			  case 0x38: /* PULX (6801) */ {
+			} case 0x38: /* PULX (6801) */ {
+				if (cputype < 0x6801)
+					goto invalidinh;
 				insn = "PULX";
 				break;
-			}
-#endif /* def SIM6801 */
-			  case 0x39: /* RTS */ {
+			} case 0x39: /* RTS */ {
 				insn = "RTS";
 				break;
-			}
-#ifdef SIM6801
- 			  case 0x3A: /* ABX (6801) */ {
+			} case 0x3A: /* ABX (6801) */ {
+				if (cputype < 0x6801)
+					goto invalidinh;
 				insn = "ABX";
 				break;
-			}
-#endif /* def SIM6801 */
-			  case 0x3B: /* RTI */ {
+			} case 0x3B: /* RTI */ {
 				insn = "RTI";
 				break;
-			}
-#ifdef SIM6801
-			  case 0x3C: /* PSHX (6801) */ {
+			} case 0x3C: /* PSHX (6801) */ {
+				if (cputype < 0x6801)
+					goto invalidinh;
 				insn = "PSHX";
 				break;
 			} case 0x3D: /* MUL C=accb bit 7 (6801) */ {
+				if (cputype < 0x6801)
+					goto invalidinh;
 				insn = "MUL";
 				break;
-			}
-#endif /* def SIM6801 */
-			  case 0x3E: /* WAI */ {
+			}  case 0x3E: /* WAI */ {
 				insn = "WAI";
 				break;
 			} case 0x3F: /* SWI */ {
@@ -758,6 +743,7 @@ void unasm_line(unsigned char *mem, unsigned short *at_pc, char *outbuf, int *at
 				is_swi = mem[ea];
 				break;
 			} default: /* ??? */ {
+invalidinh:
 				insn = "???";
 				break;
 			}