| 修订版 | 2b42f31eae2c24507c38326b3534cd9292e7dfcf (tree) |
|---|---|
| 时间 | 2019-03-16 02:11:16 |
| 作者 | Helge Deller <deller@gmx....> |
| Commiter | Richard Henderson |
Update seabios-hppa to latest upstream
This patch fixes two issues in the hppa/parisc emulation:
1. The CPU HPA was wrong in the sense that we had negative module
offsets in the firmware-internal module table (which we ignored up to
now). Get it correct by changing the CPU HPA to 0xfffb0000 which is
greater than the DINO_HPA of 0xfff80000.
This change requires the seabios-firmware update.
2. Sven noticed that the FPU register cr10 is only able to reference up
to 8 FPUs, so let's reduce the maximum amount of SMP CPUs too.
Signed-off-by: Helge Deller <deller@gmx.de>
Message-Id: <20190315164130.GA7800@ls3530>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
hw/hppa/hppa_hardware.h (diff)
pc-bios/hppa-firmware.img (diff) roms/seabios-hppa (diff)| @@ -19,7 +19,7 @@ | ||
| 19 | 19 | #define LASI_PS2KBD_HPA 0xffd08000 |
| 20 | 20 | #define LASI_PS2MOU_HPA 0xffd08100 |
| 21 | 21 | #define LASI_GFX_HPA 0xf8000000 |
| 22 | -#define CPU_HPA 0xfff10000 | |
| 22 | +#define CPU_HPA 0xfffb0000 | |
| 23 | 23 | #define MEMORY_HPA 0xfffbf000 |
| 24 | 24 | |
| 25 | 25 | #define PCI_HPA DINO_HPA /* PCI bus */ |
| @@ -36,5 +36,5 @@ | ||
| 36 | 36 | #define PORT_SERIAL1 (DINO_UART_HPA + 0x800) |
| 37 | 37 | #define PORT_SERIAL2 (LASI_UART_HPA + 0x800) |
| 38 | 38 | |
| 39 | -#define HPPA_MAX_CPUS 32 /* max. number of SMP CPUs */ | |
| 39 | +#define HPPA_MAX_CPUS 8 /* max. number of SMP CPUs */ | |
| 40 | 40 | #define CPU_CLOCK_MHZ 250 /* emulate a 250 MHz CPU */ |
| @@ -1 +1 @@ | ||
| 1 | -Subproject commit 1ef99a01572c2581c30e16e6fe69e9ea2ef92ce0 | |
| 1 | +Subproject commit 0f4fe84658165e96ce35870fd19fc634e182e77b |
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