• R/O
  • HTTP
  • SSH
  • HTTPS

提交

标签
No Tags

Frequently used words (click to add to your profile)

javac++androidlinuxc#windowsobjective-ccocoa誰得qtpythonphprubygameguibathyscaphec計画中(planning stage)翻訳omegatframeworktwitterdomtestvb.netdirectxゲームエンジンbtronarduinopreviewer

Commit MetaInfo

修订版364c22a84aa180ab8fe94f9983484c4da26e3bd6 (tree)
时间2022-07-26 02:02:04
作者Sumit Garg <sumit.garg@lina...>
CommiterTom Rini

Log Message

mmc: msm_sdhci: Add SDCC version 5.0.0 support

For SDCC version 5.0.0, MCI registers are removed from SDCC interface
and some registers are moved to HC. So add support to use the new
compatible string "qcom,sdhci-msm-v5". Based on this new msm variant,
pick the relevant variant data and use it to detect MCI presence thereby
configuring register read/write to msm specific registers.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>

更改概述

差异

--- a/drivers/mmc/msm_sdhci.c
+++ b/drivers/mmc/msm_sdhci.c
@@ -22,18 +22,17 @@
2222 #define SDCC_MCI_POWER_SW_RST BIT(7)
2323
2424 /* This is undocumented register */
25-#define SDCC_MCI_VERSION 0x50
26-#define SDCC_MCI_VERSION_MAJOR_SHIFT 28
27-#define SDCC_MCI_VERSION_MAJOR_MASK (0xf << SDCC_MCI_VERSION_MAJOR_SHIFT)
28-#define SDCC_MCI_VERSION_MINOR_MASK 0xff
25+#define SDCC_MCI_VERSION 0x50
26+#define SDCC_V5_VERSION 0x318
27+
28+#define SDCC_VERSION_MAJOR_SHIFT 28
29+#define SDCC_VERSION_MAJOR_MASK (0xf << SDCC_VERSION_MAJOR_SHIFT)
30+#define SDCC_VERSION_MINOR_MASK 0xff
2931
3032 #define SDCC_MCI_STATUS2 0x6C
3133 #define SDCC_MCI_STATUS2_MCI_ACT 0x1
3234 #define SDCC_MCI_HC_MODE 0x78
3335
34-/* Offset to SDHCI registers */
35-#define SDCC_SDHCI_OFFSET 0x900
36-
3736 /* Non standard (?) SDHCI register */
3837 #define SDHCI_VENDOR_SPEC_CAPABILITIES0 0x11c
3938
@@ -47,6 +46,10 @@ struct msm_sdhc {
4746 void *base;
4847 };
4948
49+struct msm_sdhc_variant_info {
50+ bool mci_removed;
51+};
52+
5053 DECLARE_GLOBAL_DATA_PTR;
5154
5255 static int msm_sdc_clk_init(struct udevice *dev)
@@ -85,25 +88,8 @@ static int msm_sdc_clk_init(struct udevice *dev)
8588 return 0;
8689 }
8790
88-static int msm_sdc_probe(struct udevice *dev)
91+static int msm_sdc_mci_init(struct msm_sdhc *prv)
8992 {
90- struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
91- struct msm_sdhc_plat *plat = dev_get_plat(dev);
92- struct msm_sdhc *prv = dev_get_priv(dev);
93- struct sdhci_host *host = &prv->host;
94- u32 core_version, core_minor, core_major;
95- u32 caps;
96- int ret;
97-
98- host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_BROKEN_R1B;
99-
100- host->max_clk = 0;
101-
102- /* Init clocks */
103- ret = msm_sdc_clk_init(dev);
104- if (ret)
105- return ret;
106-
10793 /* Reset the core and Enable SDHC mode */
10894 writel(readl(prv->base + SDCC_MCI_POWER) | SDCC_MCI_POWER_SW_RST,
10995 prv->base + SDCC_MCI_POWER);
@@ -126,12 +112,45 @@ static int msm_sdc_probe(struct udevice *dev)
126112 /* Enable host-controller mode */
127113 writel(1, prv->base + SDCC_MCI_HC_MODE);
128114
129- core_version = readl(prv->base + SDCC_MCI_VERSION);
115+ return 0;
116+}
130117
131- core_major = (core_version & SDCC_MCI_VERSION_MAJOR_MASK);
132- core_major >>= SDCC_MCI_VERSION_MAJOR_SHIFT;
118+static int msm_sdc_probe(struct udevice *dev)
119+{
120+ struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
121+ struct msm_sdhc_plat *plat = dev_get_plat(dev);
122+ struct msm_sdhc *prv = dev_get_priv(dev);
123+ const struct msm_sdhc_variant_info *var_info;
124+ struct sdhci_host *host = &prv->host;
125+ u32 core_version, core_minor, core_major;
126+ u32 caps;
127+ int ret;
133128
134- core_minor = core_version & SDCC_MCI_VERSION_MINOR_MASK;
129+ host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_BROKEN_R1B;
130+
131+ host->max_clk = 0;
132+
133+ /* Init clocks */
134+ ret = msm_sdc_clk_init(dev);
135+ if (ret)
136+ return ret;
137+
138+ var_info = (void *)dev_get_driver_data(dev);
139+ if (!var_info->mci_removed) {
140+ ret = msm_sdc_mci_init(prv);
141+ if (ret)
142+ return ret;
143+ }
144+
145+ if (!var_info->mci_removed)
146+ core_version = readl(prv->base + SDCC_MCI_VERSION);
147+ else
148+ core_version = readl(host->ioaddr + SDCC_V5_VERSION);
149+
150+ core_major = (core_version & SDCC_VERSION_MAJOR_MASK);
151+ core_major >>= SDCC_VERSION_MAJOR_SHIFT;
152+
153+ core_minor = core_version & SDCC_VERSION_MINOR_MASK;
135154
136155 /*
137156 * Support for some capabilities is not advertised by newer
@@ -161,9 +180,13 @@ static int msm_sdc_probe(struct udevice *dev)
161180 static int msm_sdc_remove(struct udevice *dev)
162181 {
163182 struct msm_sdhc *priv = dev_get_priv(dev);
183+ const struct msm_sdhc_variant_info *var_info;
184+
185+ var_info = (void *)dev_get_driver_data(dev);
164186
165- /* Disable host-controller mode */
166- writel(0, priv->base + SDCC_MCI_HC_MODE);
187+ /* Disable host-controller mode */
188+ if (!var_info->mci_removed)
189+ writel(0, priv->base + SDCC_MCI_HC_MODE);
167190
168191 return 0;
169192 }
@@ -195,8 +218,17 @@ static int msm_sdc_bind(struct udevice *dev)
195218 return sdhci_bind(dev, &plat->mmc, &plat->cfg);
196219 }
197220
221+static const struct msm_sdhc_variant_info msm_sdhc_mci_var = {
222+ .mci_removed = false,
223+};
224+
225+static const struct msm_sdhc_variant_info msm_sdhc_v5_var = {
226+ .mci_removed = true,
227+};
228+
198229 static const struct udevice_id msm_mmc_ids[] = {
199- { .compatible = "qcom,sdhci-msm-v4" },
230+ { .compatible = "qcom,sdhci-msm-v4", .data = (ulong)&msm_sdhc_mci_var },
231+ { .compatible = "qcom,sdhci-msm-v5", .data = (ulong)&msm_sdhc_v5_var },
200232 { }
201233 };
202234