修订版 | 6ec65c8558f5e2f98c4baf28a347354942f0f908 (tree) |
---|---|
时间 | 2022-07-26 18:29:02 |
作者 | Peng Fan <peng.fan@nxp....> |
Commiter | Stefano Babic |
tools: image: support i.MX93
Support build i.MX93 container image with mkimage
Signed-off-by: Peng Fan <peng.fan@nxp.com>
@@ -165,6 +165,7 @@ enum imx8image_core_type { | ||
165 | 165 | CFG_M40, |
166 | 166 | CFG_M41, |
167 | 167 | CFG_A35, |
168 | + CFG_A55, | |
168 | 169 | CFG_A53, |
169 | 170 | CFG_A72 |
170 | 171 | }; |
@@ -180,7 +181,9 @@ enum imx8image_fld_types { | ||
180 | 181 | typedef enum SOC_TYPE { |
181 | 182 | NONE = 0, |
182 | 183 | QX, |
183 | - QM | |
184 | + QM, | |
185 | + ULP, | |
186 | + IMX9 | |
184 | 187 | } soc_type_t; |
185 | 188 | |
186 | 189 | typedef enum option_type { |
@@ -201,7 +204,9 @@ typedef enum option_type { | ||
201 | 204 | DATA, |
202 | 205 | PARTITION, |
203 | 206 | FILEOFF, |
204 | - MSG_BLOCK | |
207 | + MSG_BLOCK, | |
208 | + SENTINEL, | |
209 | + UPOWER | |
205 | 210 | } option_type_t; |
206 | 211 | |
207 | 212 | typedef struct { |
@@ -221,6 +226,11 @@ typedef struct { | ||
221 | 226 | #define CORE_CA72 5 |
222 | 227 | #define CORE_SECO 6 |
223 | 228 | |
229 | +#define CORE_ULP_CM33 0x1 | |
230 | +#define CORE_ULP_CA35 0x2 | |
231 | +#define CORE_ULP_UPOWER 0x4 | |
232 | +#define CORE_ULP_SENTINEL 0x6 | |
233 | + | |
224 | 234 | #define SC_R_OTP 357U |
225 | 235 | #define SC_R_DEBUG 354U |
226 | 236 | #define SC_R_ROM_0 236U |
@@ -235,6 +245,7 @@ typedef struct { | ||
235 | 245 | #define IMG_TYPE_DATA 0x04 /* Data image type */ |
236 | 246 | #define IMG_TYPE_DCD_DDR 0x05 /* DCD/DDR image type */ |
237 | 247 | #define IMG_TYPE_SECO 0x06 /* SECO image type */ |
248 | +#define IMG_TYPE_SENTINEL 0x06 /* SENTINEL image type */ | |
238 | 249 | #define IMG_TYPE_PROV 0x07 /* Provisioning image type */ |
239 | 250 | #define IMG_TYPE_DEK 0x08 /* DEK validation type */ |
240 | 251 |
@@ -60,6 +60,7 @@ static table_entry_t imx8image_core_entries[] = { | ||
60 | 60 | {CFG_M40, "M40", "M4 core 0", }, |
61 | 61 | {CFG_M41, "M41", "M4 core 1", }, |
62 | 62 | {CFG_A35, "A35", "A35 core", }, |
63 | + {CFG_A55, "A55", "A55 core", }, | |
63 | 64 | {CFG_A53, "A53", "A53 core", }, |
64 | 65 | {CFG_A72, "A72", "A72 core", }, |
65 | 66 | {-1, "", "", }, |
@@ -117,6 +118,10 @@ static void parse_cfg_cmd(image_t *param_stack, int32_t cmd, char *token, | ||
117 | 118 | soc = QX; |
118 | 119 | } else if (!strncmp(token, "IMX8QM", 6)) { |
119 | 120 | soc = QM; |
121 | + } else if (!strncmp(token, "ULP", 3)) { | |
122 | + soc = IMX9; | |
123 | + } else if (!strncmp(token, "IMX9", 4)) { | |
124 | + soc = IMX9; | |
120 | 125 | } else { |
121 | 126 | fprintf(stderr, "Unknown CMD_SOC_TYPE"); |
122 | 127 | exit(EXIT_FAILURE); |
@@ -187,6 +192,7 @@ static void parse_cfg_fld(image_t *param_stack, int32_t *cmd, char *token, | ||
187 | 192 | param_stack[p_idx].filename = token; |
188 | 193 | break; |
189 | 194 | case CFG_A35: |
195 | + case CFG_A55: | |
190 | 196 | param_stack[p_idx].ext = CORE_CA35; |
191 | 197 | param_stack[p_idx].option = |
192 | 198 | (*cmd == CMD_DATA) ? DATA : AP; |
@@ -219,6 +225,7 @@ static void parse_cfg_fld(image_t *param_stack, int32_t *cmd, char *token, | ||
219 | 225 | case CFG_M41: |
220 | 226 | case CFG_A35: |
221 | 227 | case CFG_A53: |
228 | + case CFG_A55: | |
222 | 229 | case CFG_A72: |
223 | 230 | param_stack[p_idx++].entry = |
224 | 231 | (uint32_t)strtoll(token, NULL, 0); |
@@ -548,6 +555,18 @@ static void set_image_array_entry(flash_header_v3_t *container, | ||
548 | 555 | img->dst = 0x20C00000; |
549 | 556 | img->entry = 0x20000000; |
550 | 557 | break; |
558 | + case SENTINEL: | |
559 | + if (container->num_images > 0) { | |
560 | + fprintf(stderr, "Error: SENTINEL container only allows 1 image\n"); | |
561 | + return; | |
562 | + } | |
563 | + | |
564 | + img->hab_flags |= IMG_TYPE_SENTINEL; | |
565 | + img->hab_flags |= CORE_ULP_SENTINEL << BOOT_IMG_FLAGS_CORE_SHIFT; | |
566 | + tmp_name = "SENTINEL"; | |
567 | + img->dst = 0xe4000000; /* S400 IRAM base */ | |
568 | + img->entry = 0xe4000000; | |
569 | + break; | |
551 | 570 | case AP: |
552 | 571 | if (soc == QX && core == CORE_CA35) { |
553 | 572 | meta = IMAGE_A35_DEFAULT_META(custom_partition); |
@@ -555,6 +574,8 @@ static void set_image_array_entry(flash_header_v3_t *container, | ||
555 | 574 | meta = IMAGE_A53_DEFAULT_META(custom_partition); |
556 | 575 | } else if (soc == QM && core == CORE_CA72) { |
557 | 576 | meta = IMAGE_A72_DEFAULT_META(custom_partition); |
577 | + } else if (((soc == ULP) || (soc == IMX9)) && core == CORE_CA35) { | |
578 | + meta = 0; | |
558 | 579 | } else { |
559 | 580 | fprintf(stderr, |
560 | 581 | "Error: invalid AP core id: %" PRIu64 "\n", |
@@ -562,8 +583,10 @@ static void set_image_array_entry(flash_header_v3_t *container, | ||
562 | 583 | exit(EXIT_FAILURE); |
563 | 584 | } |
564 | 585 | img->hab_flags |= IMG_TYPE_EXEC; |
565 | - /* On B0, only core id = 4 is valid */ | |
566 | - img->hab_flags |= CORE_CA53 << BOOT_IMG_FLAGS_CORE_SHIFT; | |
586 | + if ((soc == ULP) || (soc == IMX9)) | |
587 | + img->hab_flags |= CORE_ULP_CA35 << BOOT_IMG_FLAGS_CORE_SHIFT; | |
588 | + else | |
589 | + img->hab_flags |= CORE_CA53 << BOOT_IMG_FLAGS_CORE_SHIFT; /* On B0, only core id = 4 is valid */ | |
567 | 590 | tmp_name = "AP"; |
568 | 591 | img->dst = entry; |
569 | 592 | img->entry = entry; |
@@ -572,17 +595,22 @@ static void set_image_array_entry(flash_header_v3_t *container, | ||
572 | 595 | break; |
573 | 596 | case M40: |
574 | 597 | case M41: |
575 | - if (core == 0) { | |
576 | - core = CORE_CM4_0; | |
577 | - meta = IMAGE_M4_0_DEFAULT_META(custom_partition); | |
578 | - } else if (core == 1) { | |
579 | - core = CORE_CM4_1; | |
580 | - meta = IMAGE_M4_1_DEFAULT_META(custom_partition); | |
598 | + if ((soc == ULP) || (soc == IMX9)) { | |
599 | + core = CORE_ULP_CM33; | |
600 | + meta = 0; | |
581 | 601 | } else { |
582 | - fprintf(stderr, | |
583 | - "Error: invalid m4 core id: %" PRIu64 "\n", | |
584 | - core); | |
585 | - exit(EXIT_FAILURE); | |
602 | + if (core == 0) { | |
603 | + core = CORE_CM4_0; | |
604 | + meta = IMAGE_M4_0_DEFAULT_META(custom_partition); | |
605 | + } else if (core == 1) { | |
606 | + core = CORE_CM4_1; | |
607 | + meta = IMAGE_M4_1_DEFAULT_META(custom_partition); | |
608 | + } else { | |
609 | + fprintf(stderr, | |
610 | + "Error: invalid m4 core id: %" PRIu64 "\n", | |
611 | + core); | |
612 | + exit(EXIT_FAILURE); | |
613 | + } | |
586 | 614 | } |
587 | 615 | img->hab_flags |= IMG_TYPE_EXEC; |
588 | 616 | img->hab_flags |= core << BOOT_IMG_FLAGS_CORE_SHIFT; |
@@ -598,7 +626,14 @@ static void set_image_array_entry(flash_header_v3_t *container, | ||
598 | 626 | break; |
599 | 627 | case DATA: |
600 | 628 | img->hab_flags |= IMG_TYPE_DATA; |
601 | - img->hab_flags |= CORE_CA35 << BOOT_IMG_FLAGS_CORE_SHIFT; | |
629 | + if ((soc == ULP) || (soc == IMX9)) { | |
630 | + if (core == CORE_CM4_0) | |
631 | + img->hab_flags |= CORE_ULP_CM33 << BOOT_IMG_FLAGS_CORE_SHIFT; | |
632 | + else | |
633 | + img->hab_flags |= CORE_ULP_CA35 << BOOT_IMG_FLAGS_CORE_SHIFT; | |
634 | + } else { | |
635 | + img->hab_flags |= CORE_CA35 << BOOT_IMG_FLAGS_CORE_SHIFT; | |
636 | + } | |
602 | 637 | tmp_name = "DATA"; |
603 | 638 | img->dst = entry; |
604 | 639 | break; |
@@ -630,6 +665,15 @@ static void set_image_array_entry(flash_header_v3_t *container, | ||
630 | 665 | img->dst = img->entry - 1; |
631 | 666 | } |
632 | 667 | break; |
668 | + case UPOWER: | |
669 | + if (soc == ULP) { | |
670 | + img->hab_flags |= IMG_TYPE_EXEC; | |
671 | + img->hab_flags |= CORE_ULP_UPOWER << BOOT_IMG_FLAGS_CORE_SHIFT; | |
672 | + tmp_name = "UPOWER"; | |
673 | + img->dst = 0x28300200; /* UPOWER code RAM */ | |
674 | + img->entry = 0x28300200; | |
675 | + } | |
676 | + break; | |
633 | 677 | default: |
634 | 678 | fprintf(stderr, "unrecognized image type (%d)\n", type); |
635 | 679 | exit(EXIT_FAILURE); |
@@ -797,6 +841,10 @@ static int build_container(soc_type_t soc, uint32_t sector_size, | ||
797 | 841 | fprintf(stdout, "Platform:\ti.MX8QXP B0\n"); |
798 | 842 | else if (soc == QM) |
799 | 843 | fprintf(stdout, "Platform:\ti.MX8QM B0\n"); |
844 | + else if (soc == ULP) | |
845 | + fprintf(stdout, "Platform:\ti.MX8ULP A0\n"); | |
846 | + else if (soc == IMX9) | |
847 | + fprintf(stdout, "Platform:\ti.MX9\n"); | |
800 | 848 | |
801 | 849 | set_imx_hdr_v3(&imx_header, 0); |
802 | 850 | set_imx_hdr_v3(&imx_header, 1); |
@@ -815,6 +863,7 @@ static int build_container(soc_type_t soc, uint32_t sector_size, | ||
815 | 863 | case M41: |
816 | 864 | case SCFW: |
817 | 865 | case DATA: |
866 | + case UPOWER: | |
818 | 867 | case MSG_BLOCK: |
819 | 868 | if (container < 0) { |
820 | 869 | fprintf(stderr, "No container found\n"); |
@@ -833,6 +882,7 @@ static int build_container(soc_type_t soc, uint32_t sector_size, | ||
833 | 882 | break; |
834 | 883 | |
835 | 884 | case SECO: |
885 | + case SENTINEL: | |
836 | 886 | if (container < 0) { |
837 | 887 | fprintf(stderr, "No container found\n"); |
838 | 888 | exit(EXIT_FAILURE); |
@@ -941,7 +991,8 @@ static int build_container(soc_type_t soc, uint32_t sector_size, | ||
941 | 991 | if (img_sp->option == M40 || img_sp->option == M41 || |
942 | 992 | img_sp->option == AP || img_sp->option == DATA || |
943 | 993 | img_sp->option == SCD || img_sp->option == SCFW || |
944 | - img_sp->option == SECO || img_sp->option == MSG_BLOCK) { | |
994 | + img_sp->option == SECO || img_sp->option == MSG_BLOCK || | |
995 | + img_sp->option == UPOWER || img_sp->option == SENTINEL) { | |
945 | 996 | copy_file_aligned(ofd, img_sp->filename, img_sp->src, |
946 | 997 | sector_size); |
947 | 998 | } |